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target-mips: generate fences

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Make use of memory barrier TCG opcode in MIPS front end.

Backports commit d208ac0c2e4cb43b74153bd584fc63c7b8a93ed6 from qemu
This commit is contained in:
Leon Alrae 2018-02-26 03:52:28 -05:00 committed by Lioncash
parent f14ece4aa1
commit f60eca6930
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 30 additions and 2 deletions
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32
qemu/target-mips/translate.c
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@ -13185,6 +13185,34 @@ static void gen_ldst_pair (DisasContext *ctx, uint32_t opc, int rd,
tcg_temp_free(tcg_ctx, t1); tcg_temp_free(tcg_ctx, t1);
} }
static void gen_sync(TCGContext *ctx, int stype)
{
TCGBar tcg_mo = TCG_BAR_SC;
switch (stype) {
case 0x4: /* SYNC_WMB */
tcg_mo |= TCG_MO_ST_ST;
break;
case 0x10: /* SYNC_MB */
tcg_mo |= TCG_MO_ALL;
break;
case 0x11: /* SYNC_ACQUIRE */
tcg_mo |= TCG_MO_LD_LD | TCG_MO_LD_ST;
break;
case 0x12: /* SYNC_RELEASE */
tcg_mo |= TCG_MO_ST_ST | TCG_MO_LD_ST;
break;
case 0x13: /* SYNC_RMB */
tcg_mo |= TCG_MO_LD_LD;
break;
default:
tcg_mo |= TCG_MO_ALL;
break;
}
tcg_gen_mb(ctx, tcg_mo);
}
static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs) static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
{ {
TCGContext *tcg_ctx = env->uc->tcg_ctx; TCGContext *tcg_ctx = env->uc->tcg_ctx;
@ -13462,7 +13490,7 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
case 0x2d: case 0x2d:
switch (minor) { switch (minor) {
case SYNC: case SYNC:
/* NOP */ gen_sync(tcg_ctx, extract32(ctx->opcode, 16, 5));
break; break;
case SYSCALL: case SYSCALL:
generate_exception_end(ctx, EXCP_SYSCALL); generate_exception_end(ctx, EXCP_SYSCALL);
@ -17297,7 +17325,7 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
break; break;
case OPC_SYNC: case OPC_SYNC:
check_insn(ctx, ISA_MIPS2); check_insn(ctx, ISA_MIPS2);
/* Treat as NOP. */ gen_sync(tcg_ctx, extract32(ctx->opcode, 6, 5));
break; break;
#if defined(TARGET_MIPS64) #if defined(TARGET_MIPS64)