8 commits

Author	SHA1	Message	Date
Laurent Vivier	8a7f7242cc	target/m68k: add fmovem ... Backports commit a1e58ddcb3eed7ec4a158512b9dae46f90492c1b from qemu	2018-03-03 21:05:56 -05:00
Laurent Vivier	50b639098c	target/m68k: add explicit single and double precision operations (part 2) ... Add fsabs, fdabs, fsneg, fdneg, fsmove and fdmove. The value is converted using the new floatx80_round() function. Backports commit 77bdb2292492fafc4bc0fbb4d8c44fdd0ef1fa8e from qemu	2018-03-03 21:02:52 -05:00
Laurent Vivier	1d5e30f30c	target/m68k: add fsglmul and fsgldiv ... fsglmul and fsgldiv truncate data to single precision before computing results. Backports commit 2f77995cebc8027851b8ea8f02c097fb8cdf668a from qemu	2018-03-03 20:59:20 -05:00
Laurent Vivier	20b610390d	target/m68k: add explicit single and double precision operations ... Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu	2018-03-03 20:55:41 -05:00
Laurent Vivier	0b62df7f30	target/m68k: add fmovecr ... fmovecr moves a floating point constant from the FPU ROM to a floating point register. Backports commit 9d403660d91229922c2786e81c23cc9dd8e644f1 from qemu	2018-03-03 20:51:21 -05:00
Laurent Vivier	f7ef6b49a8	target-m68k: add FPCR and FPSR ... Backports commit ba62494483ab51ee31c70952b6ce5171a31860b1 from qemu	2018-03-03 19:51:31 -05:00
Laurent Vivier	1c6b1e2b9f	target-m68k: use floatx80 internally ... Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu	2018-03-03 19:35:17 -05:00
Laurent Vivier	409369a7ce	target-m68k: move FPU helpers to fpu_helper.c ... Backports commit c88f8107b14456d514b00571b0675cb532e82cad from qemu	2018-03-03 15:04:05 -05:00