Commit graph

12 commits

Author SHA1 Message Date
Markus Armbruster 06668850e3
include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.

Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.

Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.

This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.

Backports commit da34e65cb4025728566d6504a99916f6e7e1dd6a from qemu
2018-02-21 23:08:18 -05:00
Yongbok Kim 46284f1a41
target-mips: implement R6 multi-threading
MIPS Release 6 provides multi-threading features which replace
pre-R6 MT Module. CP0.Config3.MT is always 0 in R6, instead there is new
CP0.Config5.VP (Virtual Processor) bit which indicates presence of
multi-threading support which includes CP0.GlobalNumber register and
DVP/EVP instructions.

Backports commit 01bc435b44b8802cc4697faa07d908684afbce4e from qemu
2018-02-20 22:02:40 -05:00
Peter Maydell 00cf2aaef2
mips: Clean up includes
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.

This commit was created with scripts/clean-includes.

Backports commit c684822ad29968af09735148f03a511bc514589d from qemu
2018-02-19 00:45:08 -05:00
Leon Alrae cab0efb406
target-mips: implement the CPU wake-up on non-enabled interrupts in R6
In Release 6, the behaviour of WAIT has been modified to make it a
requirement that a processor that has disabled operation as a result of
executing a WAIT will resume operation on arrival of an interrupt even if
interrupts are not enabled.

Backports commit 7540a43a1d9de71fa7a53ccd2bb24a04e2aace41 from qemu
2018-02-17 15:24:12 -05:00
Leon Alrae 5a60450b96
target-mips: move the test for enabled interrupts to a separate function
Backports commit 71ca034a0dee69f77c8ac6ea7d21e5b6a0b0d836 from qemu
2018-02-17 15:24:12 -05:00
Peter Crosthwaite 9e23308b66
cpu: Change cpu_exec_init() arg to cpu, not env
The callers (most of them in target-foo/cpu.c) to this function all
have the cpu pointer handy. Just pass it to avoid an ENV_GET_CPU() from
core code (in exec.c).

Backports commit 4bad9e392e788a218967167a38ce2ae7a32a6231 from qemu
2018-02-17 15:23:18 -05:00
xorstream 69ae8f7987 Fix for MIPS issue. (#733) 2017-01-23 12:39:34 +08:00
xorstream 72a497bc14 Added MIPS support and projects for all samples. 2017-01-23 01:05:08 +11:00
Nguyen Anh Quynh b678512fc1 remove kvm stuffs 2017-01-20 01:03:59 +08:00
Nguyen Anh Quynh 2f297bdd3a handle some errors properly so avoid exit() during initialization. this fixes issue #237 2015-11-12 01:43:41 +08:00
Nguyen Anh Quynh 18b6680e96 mips: disable debug output 2015-09-08 23:56:25 +08:00
Nguyen Anh Quynh 344d016104 import 2015-08-21 15:04:50 +08:00