9 commits

Author	SHA1	Message	Date
Leon Alrae	cab0efb406	target-mips: implement the CPU wake-up on non-enabled interrupts in R6 ... In Release 6, the behaviour of WAIT has been modified to make it a requirement that a processor that has disabled operation as a result of executing a WAIT will resume operation on arrival of an interrupt even if interrupts are not enabled. Backports commit 7540a43a1d9de71fa7a53ccd2bb24a04e2aace41 from qemu	2018-02-17 15:24:12 -05:00
Leon Alrae	5a60450b96	target-mips: move the test for enabled interrupts to a separate function ... Backports commit 71ca034a0dee69f77c8ac6ea7d21e5b6a0b0d836 from qemu	2018-02-17 15:24:12 -05:00
Peter Crosthwaite	9e23308b66	cpu: Change cpu_exec_init() arg to cpu, not env ... The callers (most of them in target-foo/cpu.c) to this function all have the cpu pointer handy. Just pass it to avoid an ENV_GET_CPU() from core code (in exec.c). Backports commit 4bad9e392e788a218967167a38ce2ae7a32a6231 from qemu	2018-02-17 15:23:18 -05:00
xorstream	69ae8f7987	Fix for MIPS issue. (#733)	2017-01-23 12:39:34 +08:00
xorstream	72a497bc14	Added MIPS support and projects for all samples.	2017-01-23 01:05:08 +11:00
Nguyen Anh Quynh	b678512fc1	remove kvm stuffs	2017-01-20 01:03:59 +08:00
Nguyen Anh Quynh	2f297bdd3a	handle some errors properly so avoid exit() during initialization. this fixes issue #237	2015-11-12 01:43:41 +08:00
Nguyen Anh Quynh	18b6680e96	mips: disable debug output	2015-09-08 23:56:25 +08:00
Nguyen Anh Quynh	344d016104	import	2015-08-21 15:04:50 +08:00