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177 commits

Author SHA1 Message Date
Nguyen Anh Quynh a0f7b526bd cleanup include/unicorn/*.h 2017-01-22 06:02:07 +08:00
xorstream 9fac29d154 Changed some MSVC compatibility defines based on MSVC version. (#724) 2017-01-21 20:21:27 +08:00
Nguyen Anh Quynh e98a396e68 fix include path of platform.h 2017-01-21 11:31:29 +08:00
Nguyen Anh Quynh 330e7cb87b cleanup platform.h 2017-01-21 11:02:59 +08:00
xorstream 770c5616e2 Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
xorstream 429bfca48e Fixes for MSVC native support to still work with GCC/GNU. 2017-01-21 01:07:10 +11:00
xorstream fac6a66860 platform.h move #3 2017-01-21 00:13:21 +11:00
xorstream f4b375c651 platform.h moved. 2017-01-21 00:03:50 +11:00
xorstream b0ae2138fb Merge remote-tracking branch 'unicorn-engine/master' into msvc_native 2017-01-20 22:37:51 +11:00
xorstream 1fea4e6d87 Some small changes to clean up before pull request. 2017-01-20 22:34:14 +11:00
Nguyen Anh Quynh c6de7930c9 remove mutex code 2017-01-20 15:44:03 +08:00
xorstream 92392e0f57 Merge with current master. 2017-01-20 18:22:28 +11:00
Nguyen Anh Quynh 42771848d6 no more spinlock 2017-01-20 14:57:33 +08:00
xorstream 002151874a Unicorn interface working with test app in 32bit and 64bit builds. 2017-01-20 17:27:22 +11:00
Jonas ec6602a7e1 fixed documentation of uc_emu_stop (#721) 2017-01-20 06:19:43 +08:00
xorstream 1aeaf5c40d This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
xorstream d56d09e5e1 Merge remote-tracking branch 'unicorn-engine/master' into msvc_native 2017-01-16 17:26:12 +11:00
xorstream 940c857987 Started the port for MSVC native support. 2017-01-16 17:21:12 +11:00
Elton G 47150b6df3 reg_read and reg_write now work with registers W0 through W30 in Aarch64 (#716) 
* reg_read and reg_write now work with registers W0 through W30 in Aarch64 emulaton

* Added a regress test for the ARM64 reg_read and reg_write on 32-bit registers (W0-W30)
Added a new macro in uc_priv.h (WRITE_DWORD_TO_QWORD), in order to write to the lower 32 bits of a 64 bit value without overwriting the whole value when using reg_write

* Fixed WRITE_DWORD macro

reg_write would zero out the high order bits when writing to 32 bit registers

e.g. uc.reg_write(UC_X86_REG_EAX, 0) would also set register RAX to zero
 2017-01-15 20:13:35 +08:00
Nguyen Anh Quynh bc569f5a54 rename API uc_mem_free() to uc_free(). see #662 2017-01-10 20:59:14 +08:00
Nguyen Anh Quynh fdbbdc6216 rename uc_context_free() to uc_mem_free(). see #373 2017-01-09 20:52:14 +08:00
Nguyen Anh Quynh 52cb0ba78e cleanup more synchronization code 2017-01-09 14:05:39 +08:00
cojocar 428cb83060 Support for MCLASS ARM cpu (Cortex-M3) (#700) 
Support for Cortex-M ARM CPU already exists in Qemu. This patch just
exposes a "cortex-m3" CPU.

"uc_open(UC_ARCH_ARM, UC_MODE_THUMB | UC_MODE_MCLASS, &uc);"
Instantiates a CPU with this feature on.

Signed-off-by: Lucian Cojocar <lucian@cojocar.com>
 2016-12-27 22:49:06 +08:00
Nguyen Anh Quynh 7a1930a879 add UC_VERSION_{MAJOR, MINOR, EXTRA} 2016-10-25 14:37:47 +08:00
Nguyen Anh Quynh 4083b87032 add new hook type UC_HOOK_MEM_READ_AFTER, adapted from PR #399 by @farmdve. updated all bindings, except Ruby & Haskell 2016-10-22 11:19:55 +08:00
Andrew Dutcher 80f35d3b2b remove safety checks, for some reason 2016-10-11 13:07:14 -07:00
Andrew Dutcher ea54204952 Tweak some names in a few places, encapsulate the uc_context struct to hide it from users for some reason 2016-10-10 14:04:51 -07:00
Andrew Dutcher 1ab2154fe5 Change save/restore API to have explicit alloc/free functions. Python has explicit save/update functions. 2016-10-07 11:39:42 -07:00
Nguyen Anh Quynh a6e8564153 typo 2016-10-07 10:06:53 +08:00
Nguyen Anh Quynh 73577cbcd1 rename uc_regstate_restore to uc_context_restore, uc_context_save to uc_context_save 2016-10-07 10:03:19 +08:00
Nguyen Anh Quynh b7cdbe7a88 Merge branch 'feat/reg_save_restore' of https://github.com/rhelmot/unicorn into rhelmot-feat/reg_save_restore 2016-10-07 09:57:07 +08:00
Andrew Dutcher e3b0e52013 Rename save/restore functions to match the style of the rest of the API 2016-09-28 21:21:44 -07:00
Ryan Hileman cb615fdba7 remove uc->cpus 2016-09-23 07:38:21 -07:00
Nguyen Anh Quynh 69d976375e Merge branch 'fix/self_modifying' of https://github.com/rhelmot/unicorn into rhelmot-fix/self_modifying 2016-08-30 21:20:22 +08:00
Nguyen Anh Quynh 8b030ae51a fix for issue #523 2016-08-27 21:49:11 +08:00
Andrew Dutcher 0ef2b5fd71 New feature: registers can be bulk saved/restored in an opaque blob 2016-08-20 04:14:07 -07:00
Andrew Dutcher 97b10da133 Undo the disaster that was the patch to unicorn github issue #266 and fix it correctly. makes normal self-modifying code work. 2016-08-09 19:35:20 -07:00
Hoang-Vu Dang 9a2a5b15d8 Rename unhandled CPU exception 2016-07-05 11:10:39 -05:00
Hoang-Vu Dang 9cdca5a32b Unhandled interrupt will halt execution 2016-07-04 17:07:57 -05:00
Chris Eagle 1c73753507 don't try to override native C++ data type 2016-06-06 19:05:05 -07:00
xorstream 6ca8ba16fc Changed bool typedef from int to unsigned char. 2016-05-10 23:53:39 +10:00
xorstream 544942cc64 Added MSVC bindings for uc_reg_write_batch() and uc_reg_read_batch() and fixed UC_HOOK_INSN hooking. 2016-05-10 23:29:11 +10:00
Nguyen Anh Quynh c45f791dd2 delete include/unicorn/platform.h 2016-04-30 08:41:12 +08:00
Nguyen Anh Quynh 3a742fb6f6 fix conflicts when merging no-thread to master 2016-04-23 10:06:57 +08:00
Nguyen Anh Quynh cc6cbc5cf7 Merge branch 'memleak' into m2 2016-04-18 12:48:13 +08:00
Nguyen Anh Quynh 47a7bb3c9f Merge branch 'smaller_nothreads' of https://github.com/cseagle/unicorn into cseagle-smaller_nothreads 2016-04-17 23:37:06 +08:00
Ryan Hileman acd88856e1 add batched reg access 2016-04-04 20:51:38 -07:00
Adrian Herrera fd825fb800 Added stdint include to x86.h 
x86.h referenced types defined in stdint.h (e.g. uint16_t, etc.), but didn't
actually include stdint.h
 2016-04-01 23:38:32 +11:00
Chris Eagle 9467254fc0 strip out per cpu thread code 2016-03-25 17:24:28 -07:00
Nguyen Anh Quynh fb1ebac000 Merge branch 'master' into m1 2016-03-09 15:13:42 +08:00