Nguyen Anh Quynh
7cad644235
bindings: update for latest ARM registers addition
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Backports commit 07cafff76a3093376755e61124124f6f593d64c9 from unicorn
2019-03-08 02:27:24 -05:00
Nguyen Anh Quynh
7bb8554242
bindings: update after recent addition of ARM_REG_IPSR
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Backports 6d47b38b7f8b6de0ee96a93a91180fafe2f01525 from unicorn
2019-02-28 16:44:43 -05:00
Nguyen Anh Quynh
8c8852b914
bindings: add newly added register MXCSR
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Backports commit 738d10298952d195799ce16721feffe5cb8f07bb from unicorn.
2019-02-28 16:34:51 -05:00
Nguyen Anh Quynh
41cc047b87
bindings: update after #922
2017-12-20 22:13:29 +08:00
Sascha Schirra
bc34c36eae
version changed and unicorn.gemspec renamed to unicorn-engine.gemspec ( #915 )
2017-10-27 20:30:01 +08:00
Sascha Schirra
8df86c86a4
changed gem name to unicorn-engine ( #911 )
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* changed gem name to unicorn-engine
* changed the gem name in Makefile
2017-10-17 00:53:20 +08:00
Sascha Schirra
13007eb12a
renamed unicorn gem to unicorn-engine ( #895 )
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* renamed gem unicorn to unicorn-engine
* renamed modules to unicornengine
* renamed Module Unicorn to UnicornEngine and the gem unicorn-engine to unicornengine
* unicornengine -> unicorn_engine
2017-09-19 07:43:21 +07:00
fallenoak
46ae3a042e
Ruby: Support reading and writing x86 FPU stack registers ( #892 )
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In order to reduce rounding problems from calculations, FPU stack
registers for x86 architectures contain values stored in an
80-bit extended precision format.
As a result, reading and writing to these registers requires
specific handling.
This update brings the Ruby bindings in line with the Python
bindings by supporting reading and writing the FPU stack registers
using 2-element arrays: [mantissa, exponent]
The mantissa array element contains the first 64 bits of the FPU
stack register.
The exponent array element contains the last 16 bits of the FPU
stack register.
2017-09-17 22:44:30 +07:00
Jonas
a893bcf138
Changed constatns in ruby gdt example ( #876 )
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I think those two numbers are wrong, see http://wiki.osdev.org/Global_Descriptor_Table
2017-08-29 17:03:52 +07:00
Sascha Schirra
6d8031eca4
typo fixed: contest_restore -> context_restore ( #843 )
2017-05-23 00:52:34 +08:00
misson20000
9cb64915c7
fix Ruby bindings ( #830 )
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* fix mem_unmap and query for Ruby bindings
* ruby bindings: fix issues with GC freeing callbacks while we still have references to them
* ruby bindings: add test for garbage collection of hooks
* ruby bindings: let the VM garbage collect hooks properly this time
* ruby bindings: update garbage collection test to make sure Proc is garbage collected after Uc is collected
* ruby bindings: fix m_uc_hook_add to return the ruby VALUE with proper memory management instead of making another one with bad memory management
* ruby bindings: fix cb_hook_intr signature
* add architecture query
* ruby bindings: only treat certain x86 registers specially if we're actually on x86
* only treat certain x86 registers specially if we're actually on x86 (uc_reg_read and uc_reg_write)
* ruby bindings: read and write ARM64's 128-bit NEON registers
2017-05-22 20:46:30 +08:00
misson20000
3fdb2d2442
add architecture query ( #842 )
2017-05-21 09:47:02 +08:00
misson20000
014ccfb94a
Aarch64 add thread registers ( #834 )
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* add thread registers to AArch64
* update bindings to add AArch64 thread registers
* fix indentation for register read/write switch-case in unicorn_aarch64.c
2017-05-14 14:42:49 +07:00
Ryan Hileman
187b470245
add arm64 CPACR_EL1 register support ( #814 )
2017-05-02 14:51:19 +08:00
Nguyen Anh Quynh
09d14704a5
bindings: update after UC_VERSION_EXTRA change
2017-04-25 12:41:00 +08:00
Nguyen Anh Quynh
5dbc640b9a
bump UC_VERSION_EXTRA to 1
2017-04-20 14:14:24 +08:00
Nguyen Anh Quynh
f4325f8c4e
bindings: update to support X86 MSR id
2017-02-24 21:51:01 +08:00
Sascha Schirra
eb4dc61c66
Updated ruby bindings ( #744 )
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* added methods for uc_context_save, uc_context_restore
* added test for context_save
* changed version of the lib
2017-01-29 08:13:17 +08:00
Nguyen Anh Quynh
b616115df1
update ChangeLog
2017-01-25 12:00:18 +08:00
Nguyen Anh Quynh
3543452b06
ruby: update unicorn_const.rb
2016-11-19 16:48:30 +08:00
Stephen
9f0cdc4be9
Update .travis.yml
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Update eflags_nosync.c
Update sigill2.c
Update ro_mem_test.c
Update ro_mem_test.c
Update nr_mem_test.c
Update mem_fuzz.c
Update mem_double_unmap.c
Update emu_stop_in_hook_overrun.c
Update eflags_nosync.c
remove unused
Update Makefile
Update Makefile
Update Makefile
Update Makefile
Update Makefile
Update Makefile
Update Makefile
Update mem_64_c.c
Update mem_64_c.c
Update Makefile
Update Makefile
Update Makefile
Update Makefile
Update Makefile
Update Makefile
Update .travis.yml
try android ndk build
Update unicorn.py
Update unicorn.py
Update Makefile
Update unicorn.py
Update unicorn.py
remove an untrue comment
if a dll/so/dylib gets loaded at runtime is dependent on many different factors, primarily the LD/DYLD paths. Those do not always include the current working directory
Update Makefile
Update .appveyor.yml
Update .travis.yml
Update Makefile
Update .appveyor.yml
Fix bad sample
2016-11-11 07:45:06 -08:00
Stephen
186540e160
make cleanup
2016-11-06 16:27:24 -08:00
Sascha Schirra
2f15e2119d
add new constants
2016-10-22 17:02:46 +02:00
Nguyen Anh Quynh
95e8dc0fb8
ruby & java: fix address of Thumb sample
2016-09-20 20:16:29 +08:00
Sascha Schirra
5d4fb062d4
set gdt example added
2016-03-27 22:04:33 +02:00
Sascha Schirra
cf1c7ee7ca
sample for sparc added
2016-03-27 21:44:09 +02:00
Sascha Schirra
30d26366f6
sample for mips added
2016-03-27 21:38:46 +02:00
Sascha Schirra
6c54b8e283
sample for m68k added
2016-03-27 21:31:34 +02:00
Sascha Schirra
40c8f0540c
sample for arm64 added
2016-03-27 21:15:45 +02:00
Sascha Schirra
4a10a9f9e4
sample for arm added
2016-03-27 21:00:33 +02:00
Sascha Schirra
813db7aff9
*.gem added
2016-03-27 20:59:56 +02:00
Sascha Schirra
ae979259bd
gem removed
2016-03-27 20:58:38 +02:00
Sascha Schirra
97c39a3a83
Bugfix: remove hook_add call if no insn type is given
2016-03-27 20:58:05 +02:00
Sascha Schirra
ae9e21f9b8
license parameter changed
2016-03-27 18:26:43 +02:00
Nguyen Anh Quynh
c9b36c1b1d
Merge pull request #475 from sashs/master
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GDT regress test
2016-03-25 10:09:04 +07:00
Sascha Schirra
3642c68587
Remove blank line
2016-03-22 18:36:26 +01:00
Nguyen Anh Quynh
16f77061d9
ruby: spaces & indentation
2016-03-22 20:54:51 +08:00
Sascha Schirra
a6b570d033
Version changed
2016-03-22 13:30:52 +01:00
Sascha Schirra
9379d41764
blank lines removed
2016-03-22 13:30:29 +01:00
Sascha Schirra
a9de03edfb
README format changed
2016-03-22 12:26:12 +01:00
Sascha Schirra
04cad5cd8c
README format changed
2016-03-22 12:23:08 +01:00
Sascha Schirra
80b2f45178
README format changed
2016-03-22 12:22:02 +01:00
Sascha Schirra
937b3bc22c
README changed
2016-03-22 12:19:26 +01:00
Sascha Schirra
5e72ce39f0
ruby binding added
2016-03-22 12:17:23 +01:00
