7 commits

Author	SHA1	Message	Date
Fabian Aggeler	4f5106b56d	target-arm: add CPREG secure state support ... Prepare ARMCPRegInfo to support specifying two fieldoffsets per register definition. This will allow us to keep one register definition for banked registers (different offsets for secure/ non-secure world). Also added secure state tracking field and flags. This allows for identification of the register info secure state. Backports commit c3e302606253a17568dc3ef30238f102468f7ee1 from qemu	2018-02-11 18:29:35 -05:00
Lioncash	20038fb801	Backport the PMU feature flag ... Backports the applicable code from commit 929e754d5a621cd53f30e69b766ccf381b58d124 to unicorn	2018-02-02 08:28:27 -05:00
xorstream	e08d1bf7c6	Arm issue fix. (#738) ... * Fix for MIPS issue. * Sparc support added. * M68K support added. * Arm support ported. * Fix issue with VS2015 shlobj.h file * Arm issue fix.	2017-01-24 17:45:01 +08:00
xorstream	8e45102b43	Arm support ported. (#736) ... * Fix for MIPS issue. * Sparc support added. * M68K support added. * Arm support ported. * Fix issue with VS2015 shlobj.h file	2017-01-23 23:30:57 +08:00
Chris Eagle	fccbcfd4c2	revert to use of g_free to make future qemu integrations easier (#695) ... * revert to use of g_free to make future qemu integrations easier * bracing	2016-12-21 22:28:36 +08:00
Chris Eagle	e46545f722	remove glib dependency by provide compatible replacements	2016-12-18 14:56:58 -08:00
Nguyen Anh Quynh	344d016104	import	2015-08-21 15:04:50 +08:00