Peter Maydell 1128b4d77d target/arm/translate-a64: Don't underdecode add/sub extended register ... In the "add/subtract (extended register)" encoding group, the "opt" field in bits [23:22] must be zero. Correctly UNDEF the unallocated encodings where this field is not zero. Backports commit 4f61106614410945b1d1c93081544ad5b13044fc from qemu		2019-02-03 17:55:29 -05:00
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arm	target/arm/translate-a64: Don't underdecode add/sub extended register	2019-02-03 17:55:29 -05:00
i386	i386: Enable NPT and NRIPSAVE for AMD CPUs	2019-02-03 17:55:28 -05:00
m68k	target/m68k: Fix LGPL information in the file headers	2019-02-03 17:55:29 -05:00
mips	target/mips: Add I6500 core configuration	2019-01-25 13:46:18 -05:00
sparc	target: Resolve repeated typedef warnings	2019-01-22 20:27:35 -05:00