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unicorn/qemu/accel/tcg
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Emilio G. Cota b1b069e8ad
cpu-exec: lookup/generate TB outside exclusive region during step_atomic 
Now that all code generation has been converted to check CF_PARALLEL, we can
generate !CF_PARALLEL code without having yet set !parallel_cpus --
and therefore without having to be in the exclusive region during
cpu_exec_step_atomic.

While at it, merge cpu_exec_step into cpu_exec_step_atomic.

Backports commit ac03ee5331612e44beb393df2b578c951d27dc0d from qemu
2019-05-06 00:52:43 -04:00
..
atomic_template.h tcg: Fix LGPL version number 2019-02-03 17:55:28 -05:00
cpu-exec-common.c tcg: Fix LGPL version number 2019-02-03 17:55:28 -05:00
cpu-exec.c cpu-exec: lookup/generate TB outside exclusive region during step_atomic 2019-05-06 00:52:43 -04:00
cputlb.c cputlb: Fix io_readx() to respect the access_type 2019-04-30 10:11:11 -04:00
Makefile.objs tcg: move tcg backend files into accel/tcg/ 2018-03-13 11:48:15 -04:00
softmmu_template.h cputlb: Synchronize with qemu 2019-04-26 15:48:45 -04:00
tcg-runtime-gvec.c tcg: Fix LGPL version number 2019-02-03 17:55:28 -05:00
tcg-runtime.c tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK 2019-05-04 22:22:06 -04:00
tcg-runtime.h tcg: Synchronize with qemu 2019-04-26 09:32:20 -04:00
translate-all.c tcg: check CF_PARALLEL instead of parallel_cpus 2019-05-06 00:52:08 -04:00
translate-all.h tcg: Synchronize with qemu 2019-04-26 09:32:20 -04:00
translate-common.c tcg: Fix LGPL version number 2019-02-03 17:55:28 -05:00
translator.c tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00