Paolo Bonzini 44c4dd02c9 target-i386: key sfence availability on CPUID_SSE, not CPUID_SSE2 ... sfence was introduced before lfence and mfence. This fixes Linux 2.4's measurement of checksumming speeds for the pIII_sse algorithm: md: linear personality registered as nr 1 md: raid0 personality registered as nr 2 md: raid1 personality registered as nr 3 md: raid5 personality registered as nr 4 raid5: measuring checksumming speed 8regs : 384.400 MB/sec 32regs : 259.200 MB/sec invalid operand: 0000 CPU: 0 EIP: 0010:[<c0240b2a>] Not tainted EFLAGS: 00000246 eax: c15d8000 ebx: 00000000 ecx: 00000000 edx: c15d5000 esi: 8005003b edi: 00000004 ebp: 00000000 esp: c15bdf50 ds: 0018 es: 0018 ss: 0018 Process swapper (pid: 1, stackpage=c15bd000) Stack: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000206 c0241c6c 00001000 c15d4000 c15d7000 c15d4000 c15d4000 Call Trace: [<c0241c6c>] [<c0105000>] [<c0241db4>] [<c010503b>] [<c0105000>] [<c0107416>] [<c0105030>] Code: 0f ae f8 0f 10 04 24 0f 10 4c 24 10 0f 10 54 24 20 0f 10 5c <0>Kernel panic: Attempted to kill init! Backports commit bd5d278668f33aa08755a982986cd1159746c037 from qemu		2018-02-23 14:03:19 -05:00
..
arch_memory_mapping.c	x86: Clean up includes	2018-02-19 01:00:09 -05:00
bpt_helper.c	x86: Clean up includes	2018-02-19 01:00:09 -05:00
cc_helper.c	target-i386: Perform set/reset_inhibit_irq inline	2018-02-20 13:34:47 -05:00
cc_helper_template.h	This code should now build the x86_x64-softmmu part 2.	2017-01-19 22:50:28 +11:00
cpu-qom.h	target-i386: create a separate AddressSpace for each CPU	2018-02-13 12:36:26 -05:00
cpu.c	target-i386: implement PKE for TCG	2018-02-22 10:18:55 -05:00
cpu.h	target-i386: implement PKE for TCG	2018-02-22 10:18:55 -05:00
excp_helper.c	x86: Clean up includes	2018-02-19 01:00:09 -05:00
fpu_helper.c	target-i386: implement PKE for TCG	2018-02-22 10:18:55 -05:00
helper.c	target-i386: check for PKU even for non-writable pages	2018-02-23 13:23:37 -05:00
helper.h	target-i386: implement PKE for TCG	2018-02-22 10:18:55 -05:00
int_helper.c	target-i386: Implement FSGSBASE	2018-02-20 14:45:58 -05:00
Makefile.objs	target-i386: Enable control registers for MPX	2018-02-20 13:27:46 -05:00
mem_helper.c	target-i386: Update BNDSTATUS for exceptions raised by BOUND	2018-02-20 14:24:07 -05:00
misc_helper.c	target-i386: implement PKE for TCG	2018-02-22 10:18:55 -05:00
mpx_helper.c	target-i386: fix confusion in xcr0 bit position vs. mask	2018-02-20 21:00:41 -05:00
ops_sse.h	target-i386: Rename XMM_[BWLSDQ] helpers to ZMM_*	2018-02-18 23:53:16 -05:00
ops_sse_header.h	target-i386: Rename struct XMMReg to ZMMReg	2018-02-18 23:46:30 -05:00
seg_helper.c	target-i386: Rewrite gen_enter inline	2018-02-20 10:13:43 -05:00
shift_helper_template.h	This code should now build the x86_x64-softmmu part 2.	2017-01-19 22:50:28 +11:00
smm_helper.c	target-i386: Enable control registers for MPX	2018-02-20 13:27:46 -05:00
svm.h	Automated leading tab to spaces conversion.	2017-01-21 12:28:22 +11:00
svm_helper.c	x86: Clean up includes	2018-02-19 01:00:09 -05:00
TODO	import	2015-08-21 15:04:50 +08:00
topology.h	cpu: Introduce X86CPUTopoInfo structure for argument simplification	2018-02-23 10:58:43 -05:00
translate.c	target-i386: key sfence availability on CPUID_SSE, not CPUID_SSE2	2018-02-23 14:03:19 -05:00
unicorn.c	tcg: Make cpu_tmp1 and cpu_tmp4 a TCGv	2018-02-21 00:07:23 -05:00
unicorn.h	New feature: registers can be bulk saved/restored in an opaque blob	2016-08-20 04:14:07 -07:00