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unicorn/qemu
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Paolo Bonzini 1b1f82cef7
exec: invert return value of cpu_physical_memory_get_clean, rename 
While it is obvious that cpu_physical_memory_get_dirty returns true even if
a single page is dirty, the same is not true for cpu_physical_memory_get_clean;
one would expect that it returns true only if all the pages are clean, but
it actually looks for even one clean page. (By contrast, the caller of that
function, cpu_physical_memory_range_includes_clean, has a good name).

To clarify, rename the function to cpu_physical_memory_all_dirty and return
true if _all_ the pages are dirty. This is the opposite of the previous
meaning, because "all are 1" is the same as "not (any is 0)", so we have to
modify cpu_physical_memory_range_includes_clean as well

Backports commit 72b47e79cef36ed6ffc718f10e21001d7ec2a66f from qemu
2018-02-13 09:54:12 -05:00
..
default-configs arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
docs docs: clarify memory region lifecycle 2018-02-12 15:11:21 -05:00
fpu softfloat: expand out STATUS macro 2018-02-12 13:43:13 -05:00
hw target-i386: disable LINT0 after reset 2018-02-12 21:07:36 -05:00
include exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
qapi This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
qobject This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
qom qom: Fix object_property_add_alias() with [*] 2018-02-12 16:33:58 -05:00
scripts Save copies of generated qapi files. 2017-01-21 00:30:50 +11:00
target-arm unicorn_arm: m68k/translate: Build fixes 2018-02-13 09:15:46 -05:00
target-i386 target-i386: Fix signedness of MSR_IA32_APICBASE_BASE 2018-02-13 08:17:18 -05:00
target-m68k unicorn_arm: m68k/translate: Build fixes 2018-02-13 09:15:46 -05:00
target-mips target-mips: save cpu state before calling MSA load and store helpers 2018-02-12 16:31:17 -05:00
target-sparc target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
tcg tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS 2018-02-13 08:28:29 -05:00
util Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
aarch64.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
aarch64eb.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
accel.c Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
arm.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
armeb.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
CODING_STYLE import 2015-08-21 15:04:50 +08:00
configure tcg: Drop ia64 host support 2018-02-04 18:33:02 -05:00
COPYING import 2015-08-21 15:04:50 +08:00
COPYING.LIB import 2015-08-21 15:04:50 +08:00
cpu-exec.c exec: make iotlb RCU-friendly 2018-02-12 15:20:39 -05:00
cpus.c cleanup more synchronization code 2017-01-09 14:05:39 +08:00
cputlb.c cputlb: remove useless arguments to tlb_unprotect_code_phys, rename 2018-02-13 09:07:41 -05:00
exec.c exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
gen_all_header.sh arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
glib_compat.c Merge branch 'master' into msvc2 2017-04-21 01:17:00 +08:00
HACKING import 2015-08-21 15:04:50 +08:00
header_gen.py exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
ioport.c memory: Define API for MemoryRegionOps to take attrs and return status 2018-02-12 17:17:27 -05:00
LICENSE import 2015-08-21 15:04:50 +08:00
m68k.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
Makefile cleanup qemu/default-configs/ 2017-01-19 14:52:30 +08:00
Makefile.objs cleanup qemu/Makefile.objs 2017-01-21 21:50:12 +08:00
Makefile.target tcg: Move some opcode generation functions out of line 2018-02-09 08:10:00 -05:00
memory.c memory: track DIRTY_MEMORY_CODE in mr->dirty_log_mask 2018-02-13 08:55:42 -05:00
memory_mapping.c revert to use of g_free to make future qemu integrations easier (#695) 2016-12-21 22:28:36 +08:00
mips.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
mips64.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
mips64el.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
mipsel.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
powerpc.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
qapi-schema.json import 2015-08-21 15:04:50 +08:00
qemu-log.c import 2015-08-21 15:04:50 +08:00
qemu-timer.c timer is redundant 2017-01-20 16:46:58 +08:00
rules.mak import 2015-08-21 15:04:50 +08:00
softmmu_template.h Add MemTxAttrs to the IOTLB 2018-02-12 18:38:38 -05:00
sparc.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
sparc64.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00
tcg-runtime.c platform.h move #3 2017-01-21 00:13:21 +11:00
translate-all.c translate-all: make less of tb_invalidate_phys_page_range depend on is_cpu_write_access 2018-02-13 09:18:49 -05:00
translate-all.h translate-all: remove unnecessary argument to tb_invalidate_phys_range 2018-02-13 09:04:51 -05:00
unicorn_common.h This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
VERSION import 2015-08-21 15:04:50 +08:00
vl.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
vl.h import 2015-08-21 15:04:50 +08:00
x86_64.h exec: invert return value of cpu_physical_memory_get_clean, rename 2018-02-13 09:54:12 -05:00