Amir Charif 2392d8b8ab target/arm: Check access permission to ADDVL/ADDPL/RDVL ... These instructions do not trap when SVE is disabled in EL0, causing them to be executed with wrong size information. Backports commit 5de56742a3c91de3d646326bec43a989bba83ca4 from qemu		2019-03-19 05:42:59 -04:00
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arm	target/arm: Check access permission to ADDVL/ADDPL/RDVL	2019-03-19 05:42:59 -04:00
i386	i386: extended the cpuid_level when Intel PT is enabled	2019-03-11 16:40:23 -04:00
m68k	target/m68k: Correct instruction emulation	2019-02-28 19:21:49 -05:00
mips	target/mips: Restore Qemu's organization of CPU definitions	2019-03-08 01:40:50 -05:00
riscv	target/riscv: Remove decode_RV32_64G()	2019-03-19 05:37:42 -04:00
sparc	target: Resolve repeated typedef warnings	2019-01-22 20:27:35 -05:00