Yongbok Kim 2414d1fe05 target/mips: Add CP0 PWBase register ... Add PWBase register (CP0 Register 5, Select 5). The PWBase register contains the Page Table Base virtual address. This register is required for the hardware page walker feature. It exists only if Config3 PW bit is set to 1. Backports commit 5e31fdd59fda5c4ba9eb0daadc2a26273a29a0b6 from qemu		2018-10-23 13:47:49 -04:00
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cp0_timer.c	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
cpu-qom.h	mips: MIPSCPU model subclasses	2018-03-05 00:42:29 -05:00
cpu.c	target/mips/cpu: Use type_register instead of type_register_static() in mips_cpu_register_types()	2018-09-03 17:36:23 -04:00
cpu.h	target/mips: Add CP0 PWBase register	2018-10-23 13:47:49 -04:00
dsp_helper.c	mips: Improve macro parenthesization	2018-03-05 00:51:51 -05:00
helper.c	target/mips: Add updating BadInstr and BadInstrX for nanoMIPS	2018-08-27 15:00:05 -04:00
helper.h	target/mips: Implement emulation of nanoMIPS ROTX instruction	2018-08-27 05:11:14 -04:00
internal.h	target/mips: Improve DSP R2/R3-related naming	2018-10-23 13:42:01 -04:00
lmi_helper.c	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00
Makefile.objs	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
mips-defs.h	target/mips: Improve DSP R2/R3-related naming	2018-10-23 13:42:01 -04:00
msa_helper.c	target/mips: Remove floatX_maybe_silence_nan from conversions	2018-05-19 23:25:04 -04:00
op_helper.c	target/mips: Fix ERET/ERETNC behavior related to ADEL exception	2018-08-27 15:00:59 -04:00
TODO	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00
translate.c	target/mips: Add CP0 PWBase register	2018-10-23 13:47:49 -04:00
translate_init.c	target/mips: Improve DSP R2/R3-related naming	2018-10-23 13:42:01 -04:00
unicorn.c	Use DEFINE_MACHINE() to register all machines	2018-03-11 15:12:46 -04:00
unicorn.h	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00