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unicorn/qemu
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Peter Maydell 2944a75b98 target/arm: Pull handling of XScale insns out of disas_coproc_insn() 
At the moment we check for XScale/iwMMXt insns inside
disas_coproc_insn(): for CPUs with ARM_FEATURE_XSCALE all copro insns
with cp 0 or 1 are handled specially. This works, but is an odd
place for this check, because disas_coproc_insn() is called from both
the Arm and Thumb decoders but the XScale case never applies for
Thumb (all the XScale CPUs were ARMv5, which has only Thumb1, not
Thumb2 with the 32-bit coprocessor insn encodings). It also makes it
awkward to convert the real copro access insns to decodetree.

Move the identification of XScale out to its own function
which is only called from disas_arm_insn().

Backports commit 7b4f933db865391a90a3b4518bb2050a83f2a873 from qemu
2021-02-26 10:50:32 -05:00
..
accel target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
crypto
default-configs target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
docs docs/devel/memory.txt: Document _with_attrs accessors 2018-10-04 04:46:26 -04:00
fpu softfloat: return low bits of quotient from floatx80_modrem 2021-02-25 13:39:10 -05:00
hw Expose different 32-bit ARM CPU models to users via UC_MODE flags (#1165) 2020-01-14 09:37:21 -05:00
include target/i386: floatx80: avoid compound literals in static initializers 2021-02-25 23:38:54 -05:00
qapi qapi: Rewrite string-input-visitor's integer and list parsing 2018-12-18 04:57:25 -05:00
qobject qstring: Move qstring_from_substr()'s @end one to the right 2018-08-02 21:24:19 -04:00
qom cpu: Move icount_decr to CPUNegativeOffsetState 2019-06-13 15:34:28 -04:00
scripts decodetree: Multi-cleanup 2020-06-15 12:49:02 -04:00
target target/arm: Pull handling of XScale insns out of disas_coproc_insn() 2021-02-26 10:50:32 -05:00
tcg target/riscv: add vector extension field in CPURISCVState 2021-02-26 02:17:49 -05:00
util util/cutils: Turn FIXME comment into QEMU_BUILD_BUG_ON() 2020-01-14 08:04:30 -05:00
aarch64.h target/arm: Fix temp double-free in sve ldr/str 2021-02-25 23:10:37 -05:00
aarch64eb.h target/arm: Fix temp double-free in sve ldr/str 2021-02-25 23:10:37 -05:00
accel.c
arm.h target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
armeb.h target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
CODING_STYLE.rst docs: split the CODING_STYLE doc into distinct groups 2019-11-28 02:54:44 -05:00
configure configure: Support -static-pie if requested 2020-04-30 07:09:34 -04:00
COPYING
COPYING.LIB
cpus.c Include qapi/error.h exactly where needed 2018-03-07 12:26:38 -05:00
exec.c Memory: Enable writeback for given memory region 2020-01-14 07:44:24 -05:00
gen_all_header.sh
glib_compat.c target/arm: Add VHE system register redirection and aliasing 2020-03-21 15:57:03 -04:00
header_gen.py target/riscv: vector single-width integer multiply instructions 2021-02-26 10:46:26 -05:00
ioport.c
LICENSE
m68k.h target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
Makefile Makefile: Rename targets for make recursion 2019-08-08 17:26:49 -04:00
Makefile.objs qapi: Move qapi-schema.json to qapi/, rename generated files 2018-03-09 11:35:11 -05:00
Makefile.target configure: Remove old -fno-gcse workaround for GCC 4.6.x and 4.7.[012] 2018-12-18 03:52:36 -05:00
memory.c Memory: Enable writeback for given memory region 2020-01-14 07:44:24 -05:00
memory_ldst.inc.c memory: Single byte swap along the I/O path 2020-01-07 19:12:04 -05:00
memory_mapping.c
mips.h target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
mips64.h target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
mips64el.h target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
mipsel.h target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
powerpc.h target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
qemu-timer.c
riscv32.h target/riscv: vector single-width integer multiply instructions 2021-02-26 10:46:26 -05:00
riscv64.h target/riscv: vector single-width integer multiply instructions 2021-02-26 10:46:26 -05:00
rules.mak build-sys: silence make by default or V=0 2018-03-06 08:58:03 -05:00
sparc.h target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
sparc64.h target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00
unicorn_common.h unicorn_common: Fix unicorn memory functions failing 2018-09-03 10:40:14 -04:00
VERSION Open 5.2 development tree 2021-02-25 23:52:17 -05:00
vl.c Use cpu_create(type) instead of cpu_init(cpu_model) 2018-03-20 14:20:30 -04:00
vl.h
x86_64.h target/arm: Add sve infrastructure for page lookup 2021-02-25 20:28:23 -05:00