unicorn/qemu/target
Peter Maydell 2de945ba4d target/arm: Use new FPCR_NZCV_MASK constant
We defined a constant name for the mask of NZCV bits in the FPCR/FPSCR
in the previous commit; use it in a couple of places in existing code,
where we're masking out everything except NZCV for the "load to Rt=15
sets CPSR.NZCV" special case.

Backports 6a017acdf83e3bb6bd5e85289ca90b2ea3282b7e
2021-03-03 18:47:30 -05:00
..
arm target/arm: Use new FPCR_NZCV_MASK constant 2021-03-03 18:47:30 -05:00
i386 x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
m68k target/m68k: consolidate physical translation offset into get_physical_address() 2021-02-25 23:13:48 -05:00
mips target/mips: Support variable page size 2020-06-14 21:09:51 -04:00
riscv target/riscv: Set instance_align on RISCVCPU TypeInfo 2021-03-01 19:00:27 -05:00
sparc softfloat: Name compare relation enum 2020-05-21 18:08:52 -04:00