unicorn/qemu/target
Aleksandar Markovic 3a276522ac
target/mips: Amend preprocessor constants for CP0 registers
Correct existing CP0-related preprocessor constants (replace
"CPO" with "CP0" (form letter "O" to digit "0", when needed).
Besides, add preprocessor constants for CP0 subregisters.
The names of the subregisters were chosen to be in sync with
the table of corresponding assembler mnemonics found in the
documentation for I6500 and I6400 (release 1.0).

Backports commit 04992c8cd1c43ecdba39dd8c916db092db6ebae0 from qemu
2019-01-22 19:55:04 -05:00
..
arm target/arm: Implement PMSWINC 2019-01-22 18:59:26 -05:00
i386 i386/kvm: add a comment explaining why .feat_names are commented out for Hyper-V feature bits 2019-01-14 15:02:35 -05:00
m68k m68k: Silence compiler warnings 2018-11-16 21:23:55 -05:00
mips target/mips: Amend preprocessor constants for CP0 registers 2019-01-22 19:55:04 -05:00
sparc Sparc increase ttl number 2018-10-06 04:55:52 -04:00