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Aleksandar Markovic 3a276522ac
target/mips: Amend preprocessor constants for CP0 registers 
Correct existing CP0-related preprocessor constants (replace
"CPO" with "CP0" (form letter "O" to digit "0", when needed).
Besides, add preprocessor constants for CP0 subregisters.
The names of the subregisters were chosen to be in sync with
the table of corresponding assembler mnemonics found in the
documentation for I6500 and I6400 (release 1.0).

Backports commit 04992c8cd1c43ecdba39dd8c916db092db6ebae0 from qemu
2019-01-22 19:55:04 -05:00
..
accel tcg: Support MMU protection regions smaller than TARGET_PAGE_SIZE 2018-11-16 21:35:54 -05:00
crypto
default-configs
docs docs/devel/memory.txt: Document _with_attrs accessors 2018-10-04 04:46:26 -04:00
fpu hardfloat: implement float32/64 comparison 2018-12-19 10:45:22 -05:00
hw hw/mips/mips_r4k: Fix initialization of MIPS target CPUs 2018-09-03 17:40:08 -04:00
include qemu/compiler: Add fallback macro for __has_builtin 2019-01-22 19:02:49 -05:00
qapi qapi: Rewrite string-input-visitor's integer and list parsing 2018-12-18 04:57:25 -05:00
qobject qstring: Move qstring_from_substr()'s @end one to the right 2018-08-02 21:24:19 -04:00
qom tcg: access cpu->icount_decr.u16.high with atomics 2018-10-23 14:36:46 -04:00
scripts qapi: fix flat union on uncovered branches conditionals 2018-12-19 10:53:29 -05:00
target target/mips: Amend preprocessor constants for CP0 registers 2019-01-22 19:55:04 -05:00
tcg tcg: Improve call argument loading 2019-01-05 07:24:08 -05:00
util qemu-thread: Don't block SEGV, ILL and FPE 2019-01-13 19:50:32 -05:00
aarch64.h target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0 2019-01-22 17:45:36 -05:00
aarch64eb.h target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0 2019-01-22 17:45:36 -05:00
accel.c clean-up: removed duplicate #includes 2018-02-28 08:51:56 -05:00
arm.h target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0 2019-01-22 17:45:36 -05:00
armeb.h target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0 2019-01-22 17:45:36 -05:00
CODING_STYLE
configure configure: keep track of Python version 2019-01-22 15:07:59 -05:00
COPYING
COPYING.LIB
cpus.c Include qapi/error.h exactly where needed 2018-03-07 12:26:38 -05:00
exec.c Partial backport of: exec.c: Handle IOMMUs in address_space_translate_for_iotlb() 2018-11-16 21:24:55 -05:00
gen_all_header.sh
glib_compat.c Use cpu_create(type) instead of cpu_init(cpu_model) 2018-03-20 14:20:30 -04:00
HACKING HACKING: document preference for g_new instead of g_malloc 2018-05-22 00:30:50 -04:00
header_gen.py target/mips: Provide R/W access to SAARI and SAAR CP0 registers 2019-01-22 19:51:38 -05:00
ioport.c hw: remove pio_addr_t 2018-02-24 02:43:16 -05:00
LICENSE
m68k.h target/arm: Reorganize PMCCNTR accesses 2019-01-22 16:57:29 -05:00
Makefile Revert "Makefile: Rename TARGET_DIRS to TARGET_LIST" 2018-07-05 17:40:24 -04:00
Makefile.objs qapi: Move qapi-schema.json to qapi/, rename generated files 2018-03-09 11:35:11 -05:00
Makefile.target configure: Remove old -fno-gcse workaround for GCC 4.6.x and 4.7.[012] 2018-12-18 03:52:36 -05:00
memory.c memory: learn about non-volatile memory region 2018-11-11 08:50:39 -05:00
memory_ldst.inc.c exec: Fix MAP_RAM for cached access 2018-07-03 01:11:12 -04:00
memory_mapping.c include/qemu/osdep.h: Don't include qapi/error.h 2018-02-21 23:08:18 -05:00
mips.h target/mips: Provide R/W access to SAARI and SAAR CP0 registers 2019-01-22 19:51:38 -05:00
mips64.h target/mips: Provide R/W access to SAARI and SAAR CP0 registers 2019-01-22 19:51:38 -05:00
mips64el.h target/mips: Provide R/W access to SAARI and SAAR CP0 registers 2019-01-22 19:51:38 -05:00
mipsel.h target/mips: Provide R/W access to SAARI and SAAR CP0 registers 2019-01-22 19:51:38 -05:00
powerpc.h target/arm: Reorganize PMCCNTR accesses 2019-01-22 16:57:29 -05:00
qemu-timer.c timer/cpus: fix some typos and update some comments 2018-02-25 23:21:57 -05:00
riscv32.h target/arm: Add v8M stack checks on ADD/SUB/MOV of SP 2018-10-08 14:15:15 -04:00
riscv64.h target/arm: Add v8M stack checks on ADD/SUB/MOV of SP 2018-10-08 14:15:15 -04:00
rules.mak build-sys: silence make by default or V=0 2018-03-06 08:58:03 -05:00
sparc.h target/arm: Reorganize PMCCNTR accesses 2019-01-22 16:57:29 -05:00
sparc64.h target/arm: Reorganize PMCCNTR accesses 2019-01-22 16:57:29 -05:00
unicorn_common.h unicorn_common: Fix unicorn memory functions failing 2018-09-03 10:40:14 -04:00
VERSION Open 4.0 development tree 2018-12-11 20:33:45 -05:00
vl.c Use cpu_create(type) instead of cpu_init(cpu_model) 2018-03-20 14:20:30 -04:00
vl.h
x86_64.h target/arm: Reorganize PMCCNTR accesses 2019-01-22 16:57:29 -05:00