unicorn/qemu/target
Alexandro Sanchez Bach 4a1de154ef
target/i386: Fix andn instruction
In commit 7073fbada733c8d10992f00772c9b9299d740e9b, the `andn` instruction
was implemented via `tcg_gen_andc` but passes the operands in the wrong
order:
- X86 defines `andn dest,src1,src2` as: dest = ~src1 & src2
- TCG defines `andc dest,src1,src2` as: dest = src1 & ~src2

The following simple test shows the issue:

int main(void) {
uint32_t ret = 0;
__asm (
"mov $0xFF00, %%ecx\n"
"mov $0x0F0F, %%eax\n"
"andn %%ecx, %%eax, %%ecx\n"
"mov %%ecx, %0\n"
: "=r" (ret));
printf("%08X\n", ret);
return 0;
}

This patch fixes the problem by simply swapping the order of the two last
arguments in `tcg_gen_andc_tl`.

Backports commit 5cd10051c2e02b7a86eae49919d6c65a87dbea46 from qemu
2018-04-10 08:48:05 -04:00
..
arm target/arm: Always set FAR to a known unknown value for debug exceptions 2018-03-25 16:38:14 -04:00
i386 target/i386: Fix andn instruction 2018-04-10 08:48:05 -04:00
m68k cpu: Add Error argument to cpu_exec_init() 2018-03-21 07:50:33 -04:00
mips cpu: Add Error argument to cpu_exec_init() 2018-03-21 07:50:33 -04:00
sparc cpu: Add Error argument to cpu_exec_init() 2018-03-21 07:50:33 -04:00