mirror of
https://github.com/yuzu-emu/unicorn.git
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549e31cc72
And add opcodes for 680x0 Backports commit a665a820e5d46b1611f409fbc7a540fe1c6bf5c8 from qemu
715 lines
19 KiB
C
715 lines
19 KiB
C
/*
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* m68k op helpers
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*
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* Copyright (c) 2006-2007 CodeSourcery
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* Written by Paul Brook
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/exec-all.h"
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#include "exec/helper-proto.h"
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#define SIGNBIT (1u << 31)
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M68kCPU *cpu_m68k_init(struct uc_struct *uc, const char *cpu_model)
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{
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M68kCPU *cpu;
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CPUM68KState *env;
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ObjectClass *oc;
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oc = cpu_class_by_name(uc, TYPE_M68K_CPU, cpu_model);
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if (oc == NULL) {
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return NULL;
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}
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cpu = M68K_CPU(uc, object_new(uc, object_class_get_name(oc)));
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env = &cpu->env;
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register_m68k_insns(env);
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object_property_set_bool(uc, OBJECT(cpu), true, "realized", NULL);
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return cpu;
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}
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void HELPER(movec)(CPUM68KState *env, uint32_t reg, uint32_t val)
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{
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M68kCPU *cpu = m68k_env_get_cpu(env);
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switch (reg) {
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case 0x02: /* CACR */
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env->cacr = val;
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m68k_switch_sp(env);
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break;
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case 0x04: case 0x05: case 0x06: case 0x07: /* ACR[0-3] */
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/* TODO: Implement Access Control Registers. */
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break;
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case 0x801: /* VBR */
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env->vbr = val;
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break;
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/* TODO: Implement control registers. */
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default:
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cpu_abort(CPU(cpu), "Unimplemented control register write 0x%x = 0x%x\n",
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reg, val);
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}
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}
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void HELPER(set_macsr)(CPUM68KState *env, uint32_t val)
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{
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uint32_t acc;
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int8_t exthigh;
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uint8_t extlow;
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uint64_t regval;
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int i;
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if ((env->macsr ^ val) & (MACSR_FI | MACSR_SU)) {
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for (i = 0; i < 4; i++) {
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regval = env->macc[i];
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exthigh = regval >> 40;
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if (env->macsr & MACSR_FI) {
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acc = regval >> 8;
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extlow = regval;
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} else {
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acc = regval;
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extlow = regval >> 32;
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}
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if (env->macsr & MACSR_FI) {
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regval = (((uint64_t)acc) << 8) | extlow;
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regval |= ((int64_t)exthigh) << 40;
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} else if (env->macsr & MACSR_SU) {
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regval = acc | (((int64_t)extlow) << 32);
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regval |= ((int64_t)exthigh) << 40;
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} else {
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regval = acc | (((uint64_t)extlow) << 32);
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regval |= ((uint64_t)(uint8_t)exthigh) << 40;
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}
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env->macc[i] = regval;
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}
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}
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env->macsr = val;
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}
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void m68k_switch_sp(CPUM68KState *env)
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{
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int new_sp;
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env->sp[env->current_sp] = env->aregs[7];
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new_sp = (env->sr & SR_S && env->cacr & M68K_CACR_EUSP)
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? M68K_SSP : M68K_USP;
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env->aregs[7] = env->sp[new_sp];
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env->current_sp = new_sp;
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}
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#if defined(CONFIG_USER_ONLY)
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int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
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int mmu_idx)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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cs->exception_index = EXCP_ACCESS;
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cpu->env.mmu.ar = address;
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return 1;
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}
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#else
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/* MMU */
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/* TODO: This will need fixing once the MMU is implemented. */
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hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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{
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return addr;
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}
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int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
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int mmu_idx)
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{
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int prot;
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address &= TARGET_PAGE_MASK;
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prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
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tlb_set_page(cs, address, address, prot, mmu_idx, TARGET_PAGE_SIZE);
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return 0;
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}
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/* Notify CPU of a pending interrupt. Prioritization and vectoring should
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be handled by the interrupt controller. Real hardware only requests
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the vector when the interrupt is acknowledged by the CPU. For
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simplicitly we calculate it when the interrupt is signalled. */
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void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector)
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{
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CPUState *cs = CPU(cpu);
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CPUM68KState *env = &cpu->env;
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env->pending_level = level;
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env->pending_vector = vector;
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if (level) {
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cpu_interrupt(cs, CPU_INTERRUPT_HARD);
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} else {
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cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
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}
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}
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#endif
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uint32_t HELPER(bitrev)(uint32_t x)
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{
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x = ((x >> 1) & 0x55555555u) | ((x << 1) & 0xaaaaaaaau);
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x = ((x >> 2) & 0x33333333u) | ((x << 2) & 0xccccccccu);
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x = ((x >> 4) & 0x0f0f0f0fu) | ((x << 4) & 0xf0f0f0f0u);
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return bswap32(x);
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}
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uint32_t HELPER(ff1)(uint32_t x)
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{
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int n;
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for (n = 32; x; n--)
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x >>= 1;
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return n;
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}
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uint32_t HELPER(sats)(uint32_t val, uint32_t v)
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{
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/* The result has the opposite sign to the original value. */
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if ((int32_t)v < 0) {
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val = (((int32_t)val) >> 31) ^ SIGNBIT;
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}
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return val;
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}
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void HELPER(set_sr)(CPUM68KState *env, uint32_t val)
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{
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env->sr = val & 0xffe0;
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cpu_m68k_set_ccr(env, val);
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m68k_switch_sp(env);
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}
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uint32_t HELPER(shl_cc)(CPUM68KState *env, uint32_t val, uint32_t shift)
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{
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uint64_t result;
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shift &= 63;
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result = (uint64_t)val << shift;
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env->cc_c = (result >> 32) & 1;
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env->cc_n = result;
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env->cc_z = result;
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env->cc_v = 0;
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env->cc_x = shift ? env->cc_c : env->cc_x;
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return result;
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}
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uint32_t HELPER(shr_cc)(CPUM68KState *env, uint32_t val, uint32_t shift)
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{
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uint64_t temp;
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uint32_t result;
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shift &= 63;
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temp = (uint64_t)val << 32 >> shift;
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result = temp >> 32;
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env->cc_c = (temp >> 31) & 1;
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env->cc_n = result;
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env->cc_z = result;
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env->cc_v = 0;
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env->cc_x = shift ? env->cc_c : env->cc_x;
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return result;
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}
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uint32_t HELPER(sar_cc)(CPUM68KState *env, uint32_t val, uint32_t shift)
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{
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uint64_t temp;
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uint32_t result;
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shift &= 63;
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temp = (int64_t)val << 32 >> shift;
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result = temp >> 32;
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env->cc_c = (temp >> 31) & 1;
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env->cc_n = result;
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env->cc_z = result;
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env->cc_v = result ^ val;
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env->cc_x = shift ? env->cc_c : env->cc_x;
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return result;
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}
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/* FPU helpers. */
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uint32_t HELPER(f64_to_i32)(CPUM68KState *env, float64 val)
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{
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return float64_to_int32(val, &env->fp_status);
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}
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float32 HELPER(f64_to_f32)(CPUM68KState *env, float64 val)
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{
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return float64_to_float32(val, &env->fp_status);
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}
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float64 HELPER(i32_to_f64)(CPUM68KState *env, uint32_t val)
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{
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return int32_to_float64(val, &env->fp_status);
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}
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float64 HELPER(f32_to_f64)(CPUM68KState *env, float32 val)
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{
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return float32_to_float64(val, &env->fp_status);
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}
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float64 HELPER(iround_f64)(CPUM68KState *env, float64 val)
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{
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return float64_round_to_int(val, &env->fp_status);
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}
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float64 HELPER(itrunc_f64)(CPUM68KState *env, float64 val)
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{
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return float64_trunc_to_int(val, &env->fp_status);
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}
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float64 HELPER(sqrt_f64)(CPUM68KState *env, float64 val)
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{
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return float64_sqrt(val, &env->fp_status);
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}
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float64 HELPER(abs_f64)(float64 val)
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{
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return float64_abs(val);
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}
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float64 HELPER(chs_f64)(float64 val)
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{
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return float64_chs(val);
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}
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float64 HELPER(add_f64)(CPUM68KState *env, float64 a, float64 b)
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{
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return float64_add(a, b, &env->fp_status);
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}
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float64 HELPER(sub_f64)(CPUM68KState *env, float64 a, float64 b)
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{
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return float64_sub(a, b, &env->fp_status);
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}
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float64 HELPER(mul_f64)(CPUM68KState *env, float64 a, float64 b)
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{
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return float64_mul(a, b, &env->fp_status);
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}
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float64 HELPER(div_f64)(CPUM68KState *env, float64 a, float64 b)
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{
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return float64_div(a, b, &env->fp_status);
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}
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float64 HELPER(sub_cmp_f64)(CPUM68KState *env, float64 a, float64 b)
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{
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/* ??? This may incorrectly raise exceptions. */
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/* ??? Should flush denormals to zero. */
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float64 res;
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res = float64_sub(a, b, &env->fp_status);
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if (float64_is_quiet_nan(res, &env->fp_status)) {
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/* +/-inf compares equal against itself, but sub returns nan. */
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if (!float64_is_quiet_nan(a, &env->fp_status)
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&& !float64_is_quiet_nan(b, &env->fp_status)) {
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res = float64_zero;
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if (float64_lt_quiet(a, res, &env->fp_status))
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res = float64_chs(res);
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}
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}
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return res;
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}
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uint32_t HELPER(compare_f64)(CPUM68KState *env, float64 val)
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{
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return float64_compare_quiet(val, float64_zero, &env->fp_status);
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}
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/* MAC unit. */
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/* FIXME: The MAC unit implementation is a bit of a mess. Some helpers
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take values, others take register numbers and manipulate the contents
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in-place. */
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void HELPER(mac_move)(CPUM68KState *env, uint32_t dest, uint32_t src)
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{
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uint32_t mask;
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env->macc[dest] = env->macc[src];
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mask = MACSR_PAV0 << dest;
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if (env->macsr & (MACSR_PAV0 << src))
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env->macsr |= mask;
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else
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env->macsr &= ~mask;
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}
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uint64_t HELPER(macmuls)(CPUM68KState *env, uint32_t op1, uint32_t op2)
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{
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int64_t product;
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int64_t res;
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product = (uint64_t)op1 * op2;
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res = (product << 24) >> 24;
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if (res != product) {
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env->macsr |= MACSR_V;
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if (env->macsr & MACSR_OMC) {
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/* Make sure the accumulate operation overflows. */
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if (product < 0)
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res = ~(1ll << 50);
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else
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res = 1ll << 50;
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}
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}
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return res;
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}
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uint64_t HELPER(macmulu)(CPUM68KState *env, uint32_t op1, uint32_t op2)
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{
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uint64_t product;
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product = (uint64_t)op1 * op2;
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if (product & (0xffffffull << 40)) {
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env->macsr |= MACSR_V;
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if (env->macsr & MACSR_OMC) {
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/* Make sure the accumulate operation overflows. */
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product = 1ll << 50;
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} else {
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product &= ((1ull << 40) - 1);
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}
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}
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return product;
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}
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uint64_t HELPER(macmulf)(CPUM68KState *env, uint32_t op1, uint32_t op2)
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{
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uint64_t product;
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uint32_t remainder;
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product = (uint64_t)op1 * op2;
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if (env->macsr & MACSR_RT) {
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remainder = product & 0xffffff;
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product >>= 24;
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if (remainder > 0x800000)
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product++;
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else if (remainder == 0x800000)
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product += (product & 1);
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} else {
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product >>= 24;
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}
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return product;
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}
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void HELPER(macsats)(CPUM68KState *env, uint32_t acc)
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{
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int64_t tmp;
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int64_t result;
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tmp = env->macc[acc];
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result = ((tmp << 16) >> 16);
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if (result != tmp) {
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env->macsr |= MACSR_V;
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}
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if (env->macsr & MACSR_V) {
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env->macsr |= MACSR_PAV0 << acc;
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if (env->macsr & MACSR_OMC) {
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/* The result is saturated to 32 bits, despite overflow occurring
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at 48 bits. Seems weird, but that's what the hardware docs
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say. */
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result = (result >> 63) ^ 0x7fffffff;
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}
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}
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env->macc[acc] = result;
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}
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void HELPER(macsatu)(CPUM68KState *env, uint32_t acc)
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{
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uint64_t val;
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val = env->macc[acc];
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if (val & (0xffffull << 48)) {
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env->macsr |= MACSR_V;
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}
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if (env->macsr & MACSR_V) {
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env->macsr |= MACSR_PAV0 << acc;
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if (env->macsr & MACSR_OMC) {
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if (val > (1ull << 53))
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val = 0;
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else
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val = (1ull << 48) - 1;
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} else {
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val &= ((1ull << 48) - 1);
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}
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}
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env->macc[acc] = val;
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}
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void HELPER(macsatf)(CPUM68KState *env, uint32_t acc)
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{
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int64_t sum;
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int64_t result;
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sum = env->macc[acc];
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result = (sum << 16) >> 16;
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if (result != sum) {
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env->macsr |= MACSR_V;
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}
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if (env->macsr & MACSR_V) {
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env->macsr |= MACSR_PAV0 << acc;
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if (env->macsr & MACSR_OMC) {
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result = (result >> 63) ^ 0x7fffffffffffll;
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}
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}
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env->macc[acc] = result;
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}
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void HELPER(mac_set_flags)(CPUM68KState *env, uint32_t acc)
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{
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uint64_t val;
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val = env->macc[acc];
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if (val == 0) {
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env->macsr |= MACSR_Z;
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} else if (val & (1ull << 47)) {
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env->macsr |= MACSR_N;
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}
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if (env->macsr & (MACSR_PAV0 << acc)) {
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env->macsr |= MACSR_V;
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}
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if (env->macsr & MACSR_FI) {
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val = ((int64_t)val) >> 40;
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if (val != 0 && val != -1)
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env->macsr |= MACSR_EV;
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} else if (env->macsr & MACSR_SU) {
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val = ((int64_t)val) >> 32;
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if (val != 0 && val != -1)
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env->macsr |= MACSR_EV;
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} else {
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if ((val >> 32) != 0)
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env->macsr |= MACSR_EV;
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}
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}
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#define COMPUTE_CCR(op, x, n, z, v, c) { \
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switch (op) { \
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case CC_OP_FLAGS: \
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/* Everything in place. */ \
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break; \
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case CC_OP_ADD: \
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res = n; \
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src2 = v; \
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src1 = res - src2; \
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c = x; \
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z = n; \
|
|
v = (res ^ src1) & ~(src1 ^ src2); \
|
|
break; \
|
|
case CC_OP_SUB: \
|
|
res = n; \
|
|
src2 = v; \
|
|
src1 = res + src2; \
|
|
c = x; \
|
|
z = n; \
|
|
v = (res ^ src1) & (src1 ^ src2); \
|
|
break; \
|
|
case CC_OP_CMP: \
|
|
src1 = n; \
|
|
src2 = v; \
|
|
res = src1 - src2; \
|
|
n = res; \
|
|
z = res; \
|
|
c = src1 < src2; \
|
|
v = (res ^ src1) & (src1 ^ src2); \
|
|
break; \
|
|
case CC_OP_LOGIC: \
|
|
c = v = 0; \
|
|
z = n; \
|
|
break; \
|
|
default: \
|
|
cpu_abort(CPU(m68k_env_get_cpu(env)), "Bad CC_OP %d", op); \
|
|
} \
|
|
} while (0)
|
|
|
|
uint32_t cpu_m68k_get_ccr(CPUM68KState *env)
|
|
{
|
|
uint32_t x, c, n, z, v;
|
|
uint32_t res, src1, src2;
|
|
|
|
x = env->cc_x;
|
|
c = env->cc_c;
|
|
n = env->cc_n;
|
|
z = env->cc_z;
|
|
v = env->cc_v;
|
|
|
|
COMPUTE_CCR(env->cc_op, x, n, z, v, c);
|
|
|
|
n = n >> 31;
|
|
v = v >> 31;
|
|
z = (z == 0);
|
|
|
|
return x * CCF_X + n * CCF_N + z * CCF_Z + v * CCF_V + c * CCF_C;
|
|
}
|
|
|
|
uint32_t HELPER(get_ccr)(CPUM68KState *env)
|
|
{
|
|
return cpu_m68k_get_ccr(env);
|
|
}
|
|
|
|
void cpu_m68k_set_ccr(CPUM68KState *env, uint32_t ccr)
|
|
{
|
|
env->cc_x = (ccr & CCF_X ? 1 : 0);
|
|
env->cc_n = (ccr & CCF_N ? -1 : 0);
|
|
env->cc_z = (ccr & CCF_Z ? 0 : 1);
|
|
env->cc_v = (ccr & CCF_V ? -1 : 0);
|
|
env->cc_c = (ccr & CCF_C ? 1 : 0);
|
|
env->cc_op = CC_OP_FLAGS;
|
|
}
|
|
|
|
void HELPER(set_ccr)(CPUM68KState *env, uint32_t ccr)
|
|
{
|
|
cpu_m68k_set_ccr(env, ccr);
|
|
}
|
|
|
|
void HELPER(flush_flags)(CPUM68KState *env, uint32_t cc_op)
|
|
{
|
|
uint32_t res, src1, src2;
|
|
|
|
COMPUTE_CCR(cc_op, env->cc_x, env->cc_n, env->cc_z, env->cc_v, env->cc_c);
|
|
env->cc_op = CC_OP_FLAGS;
|
|
}
|
|
|
|
uint32_t HELPER(get_macf)(CPUM68KState *env, uint64_t val)
|
|
{
|
|
int rem;
|
|
uint32_t result;
|
|
|
|
if (env->macsr & MACSR_SU) {
|
|
/* 16-bit rounding. */
|
|
rem = val & 0xffffff;
|
|
val = (val >> 24) & 0xffffu;
|
|
if (rem > 0x800000)
|
|
val++;
|
|
else if (rem == 0x800000)
|
|
val += (val & 1);
|
|
} else if (env->macsr & MACSR_RT) {
|
|
/* 32-bit rounding. */
|
|
rem = val & 0xff;
|
|
val >>= 8;
|
|
if (rem > 0x80)
|
|
val++;
|
|
else if (rem == 0x80)
|
|
val += (val & 1);
|
|
} else {
|
|
/* No rounding. */
|
|
val >>= 8;
|
|
}
|
|
if (env->macsr & MACSR_OMC) {
|
|
/* Saturate. */
|
|
if (env->macsr & MACSR_SU) {
|
|
if (val != (uint16_t) val) {
|
|
result = ((val >> 63) ^ 0x7fff) & 0xffff;
|
|
} else {
|
|
result = val & 0xffff;
|
|
}
|
|
} else {
|
|
if (val != (uint32_t)val) {
|
|
result = ((uint32_t)(val >> 63) & 0x7fffffff);
|
|
} else {
|
|
result = (uint32_t)val;
|
|
}
|
|
}
|
|
} else {
|
|
/* No saturation. */
|
|
if (env->macsr & MACSR_SU) {
|
|
result = val & 0xffff;
|
|
} else {
|
|
result = (uint32_t)val;
|
|
}
|
|
}
|
|
return result;
|
|
}
|
|
|
|
uint32_t HELPER(get_macs)(uint64_t val)
|
|
{
|
|
if (val == (int32_t)val) {
|
|
return (int32_t)val;
|
|
} else {
|
|
return (val >> 61) ^ ~SIGNBIT;
|
|
}
|
|
}
|
|
|
|
uint32_t HELPER(get_macu)(uint64_t val)
|
|
{
|
|
if ((val >> 32) == 0) {
|
|
return (uint32_t)val;
|
|
} else {
|
|
return 0xffffffffu;
|
|
}
|
|
}
|
|
|
|
uint32_t HELPER(get_mac_extf)(CPUM68KState *env, uint32_t acc)
|
|
{
|
|
uint32_t val;
|
|
val = env->macc[acc] & 0x00ff;
|
|
val |= (env->macc[acc] >> 32) & 0xff00;
|
|
val |= (env->macc[acc + 1] << 16) & 0x00ff0000;
|
|
val |= (env->macc[acc + 1] >> 16) & 0xff000000;
|
|
return val;
|
|
}
|
|
|
|
uint32_t HELPER(get_mac_exti)(CPUM68KState *env, uint32_t acc)
|
|
{
|
|
uint32_t val;
|
|
val = (env->macc[acc] >> 32) & 0xffff;
|
|
val |= (env->macc[acc + 1] >> 16) & 0xffff0000;
|
|
return val;
|
|
}
|
|
|
|
void HELPER(set_mac_extf)(CPUM68KState *env, uint32_t val, uint32_t acc)
|
|
{
|
|
int64_t res;
|
|
int32_t tmp;
|
|
res = env->macc[acc] & 0xffffffff00ull;
|
|
tmp = (int16_t)(val & 0xff00);
|
|
res |= ((int64_t)tmp) << 32;
|
|
res |= val & 0xff;
|
|
env->macc[acc] = res;
|
|
res = env->macc[acc + 1] & 0xffffffff00ull;
|
|
tmp = (val & 0xff000000);
|
|
res |= ((int64_t)tmp) << 16;
|
|
res |= (val >> 16) & 0xff;
|
|
env->macc[acc + 1] = res;
|
|
}
|
|
|
|
void HELPER(set_mac_exts)(CPUM68KState *env, uint32_t val, uint32_t acc)
|
|
{
|
|
int64_t res;
|
|
int32_t tmp;
|
|
res = (uint32_t)env->macc[acc];
|
|
tmp = (int16_t)val;
|
|
res |= ((int64_t)tmp) << 32;
|
|
env->macc[acc] = res;
|
|
res = (uint32_t)env->macc[acc + 1];
|
|
tmp = val & 0xffff0000;
|
|
res |= (int64_t)tmp << 16;
|
|
env->macc[acc + 1] = res;
|
|
}
|
|
|
|
void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc)
|
|
{
|
|
uint64_t res;
|
|
res = (uint32_t)env->macc[acc];
|
|
res |= ((uint64_t)(val & 0xffff)) << 32;
|
|
env->macc[acc] = res;
|
|
res = (uint32_t)env->macc[acc + 1];
|
|
res |= (uint64_t)(val & 0xffff0000) << 16;
|
|
env->macc[acc + 1] = res;
|
|
}
|