unicorn/qemu/target
Rémi Denis-Courmont d9592046ef target/arm: fix stage 2 page-walks in 32-bit emulation
Using a target unsigned long would limit the Input Address to a LPAE
page-walk to 32 bits on AArch32 and 64 bits on AArch64. This is okay
for stage 1 or on AArch64, but it is insufficient for stage 2 on
AArch32. In that later case, the Input Address can have up to 40 bits.

Backports commit 98e8779770c40901ed585745aacc9a8e2b934a28
2021-03-02 13:37:02 -05:00
..
arm target/arm: fix stage 2 page-walks in 32-bit emulation 2021-03-02 13:37:02 -05:00
i386 x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
m68k target/m68k: consolidate physical translation offset into get_physical_address() 2021-02-25 23:13:48 -05:00
mips target/mips: Support variable page size 2020-06-14 21:09:51 -04:00
riscv target/riscv: Set instance_align on RISCVCPU TypeInfo 2021-03-01 19:00:27 -05:00
sparc softfloat: Name compare relation enum 2020-05-21 18:08:52 -04:00