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In OpenSPARC T1+ TWINX ASIs in store instructions are aliased with Block Initializing Store ASIs. "UltraSPARC T1 Supplement Draft D2.1, 14 May 2007" describes them in the chapter "5.9 Block Initializing Store ASIs" Integer stores of all sizes are allowed with these ASIs. Backports commit 3390537b5df4014e24a30f9bdcfa05c2bd0cd6d8 from qemu |
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asi.h | ||
cc_helper.c | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
fop_helper.c | ||
helper.c | ||
helper.h | ||
int32_helper.c | ||
int64_helper.c | ||
ldst_helper.c | ||
Makefile.objs | ||
mmu_helper.c | ||
TODO | ||
translate.c | ||
unicorn.c | ||
unicorn.h | ||
unicorn64.c | ||
vis_helper.c | ||
win_helper.c |