Michael Davidsaver 5b9f53bd27 armv7m: Simpler and faster exception start ... All the places in armv7m_cpu_do_interrupt() which pend an exception in the NVIC are doing so for synchronous exceptions. We know that we will always take some exception in this case, so we can just acknowledge it immediately, rather than returning and then immediately being called again because the NVIC has raised its outbound IRQ line. Backports commit a25dc805e2e63a55029e787a52335e12dabf07dc from qemu		2018-03-02 19:52:01 -05:00
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arm	armv7m: Simpler and faster exception start	2018-03-02 19:52:01 -05:00
i386	i386: Don't override -cpu options on -cpu host/max	2018-03-02 14:22:45 -05:00
m68k	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00
mips	target/mips: fix delay slot detection in gen_msa_branch()	2018-03-02 14:15:50 -05:00
sparc	cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap	2018-03-02 10:12:40 -05:00