Emilio G. Cota 170f6e0b3b tb: consistently use uint32_t for tb->flags ... We are inconsistent with the type of tb->flags: usage varies loosely between int and uint64_t. Settle to uint32_t everywhere, which is superior to both: at least one target (aarch64) uses the most significant bit in the u32, and uint64_t is wasteful. Compile-tested for all targets. Backports commit 89fee74a0f066dfd73830a7b5fa137e87888c870 from qemu		2018-02-23 21:28:11 -05:00
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cpu-qom.h	remove slow cpu QOM casts (#815)	2017-05-02 14:56:39 +08:00
cpu.c	include/qemu/osdep.h: Don't include qapi/error.h	2018-02-21 23:08:18 -05:00
cpu.h	tb: consistently use uint32_t for tb->flags	2018-02-23 21:28:11 -05:00
dsp_helper.c	mips: Clean up includes	2018-02-19 00:45:08 -05:00
helper.c	target-mips: fix call to memset in soft reset code	2018-02-23 14:01:50 -05:00
helper.h	target-mips: add MAAR, MAARI register	2018-02-22 11:00:17 -05:00
lmi_helper.c	mips: Clean up includes	2018-02-19 00:45:08 -05:00
Makefile.objs	import	2015-08-21 15:04:50 +08:00
mips-defs.h	target-mips: fix MIPS64R6-generic configuration	2018-02-17 15:23:21 -05:00
msa_helper.c	mips: Clean up includes	2018-02-19 00:45:08 -05:00
op_helper.c	target-mips: Fix RDHWR exception host PC	2018-02-23 13:59:37 -05:00
TODO	import	2015-08-21 15:04:50 +08:00
translate.c	target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUs	2018-02-22 11:30:08 -05:00
translate_init.c	target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUs	2018-02-22 11:30:08 -05:00
unicorn.c	tcg: Make cpu_gpr a TCGv array	2018-02-21 01:02:46 -05:00
unicorn.h	armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition.	2017-03-15 22:25:35 +08:00