Peter Maydell 6f31c219b9 hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVIC ... Instead of hardcoding the values of M profile ID registers in the NVIC, use the fields in the CPU struct. This will allow us to give different M profile CPU types different ID register values. This commit includes the addition of the missing ID_ISAR5, which exists as RES0 in both v7M and v8M. (The values of the ID registers might be wrong for the M4 -- this commit leaves the behaviour there unchanged.) Backports commit 5a53e2c1dc939fea1af92cc126ee546d8211d412 from qemu		2018-03-08 09:34:37 -05:00
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arm	hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVIC	2018-03-08 09:34:37 -05:00
i386	Include qapi/qmp/qdict.h exactly where needed	2018-03-08 08:51:46 -05:00
m68k	m68k: implement movep instruction	2018-03-07 11:51:32 -05:00
mips	unicorn/mips: Lessen the amount of MIPS_CPU macro usage	2018-03-07 10:50:08 -05:00
sparc	sparc: move adhoc CPUSPARCState initialization to realize time	2018-03-07 21:40:33 -05:00