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unicorn/qemu/target/arm
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Peter Maydell 6f31c219b9
hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVIC 
Instead of hardcoding the values of M profile ID registers in the
NVIC, use the fields in the CPU struct. This will allow us to
give different M profile CPU types different ID register values.

This commit includes the addition of the missing ID_ISAR5,
which exists as RES0 in both v7M and v8M.

(The values of the ID registers might be wrong for the M4 --
this commit leaves the behaviour there unchanged.)

Backports commit 5a53e2c1dc939fea1af92cc126ee546d8211d412 from qemu
2018-03-08 09:34:37 -05:00
..
arm-powerctl.c ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2018-03-02 00:20:11 -05:00
cpu-qom.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
cpu.c hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVIC 2018-03-08 09:34:37 -05:00
cpu.h target/arm: Enforce access to ZCR_EL at translation 2018-03-08 09:17:33 -05:00
cpu64.c target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support 2018-03-07 08:58:43 -05:00
crypto_helper.c target/arm: implement SM4 instructions 2018-03-07 08:57:53 -05:00
helper-a64.c target/arm: Fix stlxp for aarch64_be 2018-03-06 08:48:12 -05:00
helper-a64.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
helper.c target/arm: Enforce access to ZCR_EL at translation 2018-03-08 09:17:33 -05:00
helper.h target/arm: implement SM4 instructions 2018-03-07 08:57:53 -05:00
internals.h target/arm: Enforce access to ZCR_EL at translation 2018-03-08 09:17:33 -05:00
iwmmxt_helper.c Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
Makefile.objs ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
neon_helper.c target/arm: Use pointers in neon zip/uzp helpers 2018-03-06 10:17:51 -05:00
op_addsub.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_helper.c accel/tcg: add size paremeter in tlb_fill() 2018-03-06 10:56:34 -05:00
psci.c fix WFI/WFE length in syndrome register 2018-03-05 11:21:51 -05:00
translate-a64.c target/arm: Handle SVE registers when using clear_vec_high 2018-03-08 09:32:33 -05:00
translate.c target/arm/translate.c: Fix missing 'break' for TT insns 2018-03-07 11:45:39 -05:00
translate.h target/arm: Add SVE state to TB->FLAGS 2018-03-07 11:44:32 -05:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_aarch64.c unicorn/aarch64: Use qemu-provided helpers for accessing VFP/NEON/SIMD registers 2018-03-07 11:25:41 -05:00
unicorn_arm.c unicorn/aarch64: Use qemu-provided helpers for accessing VFP/NEON/SIMD registers 2018-03-07 11:25:41 -05:00