Alistair Francis 7219548fbd tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS ... Instead of hard coding 31 for the shift right use TCG_TARGET_REG_BITS - 1. Backports commit 161dec9d1b03552e78e5728186eae9cf1dfbe035 from qemu		2018-12-18 05:58:09 -05:00
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accel
crypto
default-configs
docs
fpu
hw
include	qapi: Rewrite string-input-visitor's integer and list parsing	2018-12-18 04:57:25 -05:00
qapi	qapi: Rewrite string-input-visitor's integer and list parsing	2018-12-18 04:57:25 -05:00
qobject
qom
scripts	qapi: Do not define enumeration value explicitly	2018-12-18 05:03:22 -05:00
target	target/arm: Free name string in ARMCPRegInfo hashtable entries'	2018-12-18 05:09:59 -05:00
tcg	tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS	2018-12-18 05:58:09 -05:00
util	cutils: Fix qemu_strtosz() & friends to reject non-finite sizes	2018-12-18 04:48:12 -05:00
aarch64.h
aarch64eb.h
accel.c
arm.h
armeb.h
CODING_STYLE
configure
COPYING
COPYING.LIB
cpus.c
exec.c
gen_all_header.sh
glib_compat.c
HACKING
header_gen.py
ioport.c
LICENSE
m68k.h
Makefile
Makefile.objs
Makefile.target
memory.c
memory_ldst.inc.c
memory_mapping.c
mips.h
mips64.h
mips64el.h
mipsel.h
powerpc.h
qemu-timer.c
riscv32.h
riscv64.h
rules.mak
sparc.h
sparc64.h
unicorn_common.h
VERSION
vl.c
vl.h
x86_64.h	target/arm: Correctly implement handling of HCR_EL2.{VI, VF}	2018-11-16 21:53:53 -05:00