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	There are functions tlb_fill(), cpu_unaligned_access() and do_unaligned_access() that are called with access type and mmu index arguments. But these arguments are named 'is_write' and 'is_user' in their declarations. The patches fix the arguments to avoid a confusion. Backports commit b35399bb4e9968296a12303b00f9f2066470e987 from qemu
		
			
				
	
	
		
			227 lines
		
	
	
		
			5.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			227 lines
		
	
	
		
			5.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 *  M68K helper routines
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 *
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 *  Copyright (c) 2007 CodeSourcery
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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 */
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "exec/exec-all.h"
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#include "exec/cpu_ldst.h"
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#if defined(CONFIG_USER_ONLY)
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void m68k_cpu_do_interrupt(CPUState *cs)
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{
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    cs->exception_index = -1;
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}
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static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
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{
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}
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#else
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extern int semihosting_enabled;
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/* Try to fill the TLB and return an exception if error. If retaddr is
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   NULL, it means that the function was called in C code (i.e. not
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   from generated code or from helper.c) */
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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              int mmu_idx, uintptr_t retaddr)
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{
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    int ret;
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    ret = m68k_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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    if (unlikely(ret)) {
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        if (retaddr) {
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            /* now we have a real cpu fault */
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            cpu_restore_state(cs, retaddr);
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        }
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        cpu_loop_exit(cs);
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    }
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}
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static void do_rte(CPUM68KState *env)
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{
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    uint32_t sp;
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    uint32_t fmt;
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    sp = env->aregs[7];
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    fmt = cpu_ldl_kernel(env, sp);
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    env->pc = cpu_ldl_kernel(env, sp + 4);
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    sp |= (fmt >> 28) & 3;
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    env->sr = fmt & 0xffff;
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    env->aregs[7] = sp + 8;
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    m68k_switch_sp(env);
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}
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static void do_interrupt_all(CPUM68KState *env, int is_hw)
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{
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    CPUState *cs = CPU(m68k_env_get_cpu(env));
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    uint32_t sp;
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    uint32_t fmt;
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    uint32_t retaddr;
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    uint32_t vector;
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    fmt = 0;
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    retaddr = env->pc;
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    if (!is_hw) {
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        switch (cs->exception_index) {
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        case EXCP_RTE:
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            /* Return from an exception.  */
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            do_rte(env);
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            return;
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        case EXCP_HALT_INSN:
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            cs->halted = 1;
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            cs->exception_index = EXCP_HLT;
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            cpu_loop_exit(cs);
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            return;
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        }
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        if (cs->exception_index >= EXCP_TRAP0
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            && cs->exception_index <= EXCP_TRAP15) {
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            /* Move the PC after the trap instruction.  */
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            retaddr += 2;
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        }
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    }
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    vector = cs->exception_index << 2;
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    fmt |= 0x40000000;
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    fmt |= vector << 16;
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    fmt |= env->sr;
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    env->sr |= SR_S;
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    if (is_hw) {
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        env->sr = (env->sr & ~SR_I) | (env->pending_level << SR_I_SHIFT);
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        env->sr &= ~SR_M;
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    }
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    m68k_switch_sp(env);
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    sp = env->aregs[7];
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    fmt |= (sp & 3) << 28;
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    /* ??? This could cause MMU faults.  */
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    sp &= ~3;
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    sp -= 4;
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    cpu_stl_kernel(env, sp, retaddr);
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    sp -= 4;
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    cpu_stl_kernel(env, sp, fmt);
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    env->aregs[7] = sp;
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    /* Jump to vector.  */
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    env->pc = cpu_ldl_kernel(env, env->vbr + vector);
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}
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void m68k_cpu_do_interrupt(CPUState *cs)
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{
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    M68kCPU *cpu = M68K_CPU(cs->uc, cs);
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    CPUM68KState *env = &cpu->env;
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    do_interrupt_all(env, 0);
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}
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static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
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{
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    do_interrupt_all(env, 1);
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}
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#endif
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bool m68k_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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{
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    M68kCPU *cpu = M68K_CPU(cs->uc, cs);
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    CPUM68KState *env = &cpu->env;
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    if (interrupt_request & CPU_INTERRUPT_HARD
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        && ((env->sr & SR_I) >> SR_I_SHIFT) < env->pending_level) {
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        /* Real hardware gets the interrupt vector via an IACK cycle
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           at this point.  Current emulated hardware doesn't rely on
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           this, so we provide/save the vector when the interrupt is
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           first signalled.  */
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        cs->exception_index = env->pending_vector;
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        do_interrupt_m68k_hardirq(env);
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        return true;
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    }
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    return false;
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}
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static void raise_exception(CPUM68KState *env, int tt)
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{
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    CPUState *cs = CPU(m68k_env_get_cpu(env));
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    cs->exception_index = tt;
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    cpu_loop_exit(cs);
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}
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void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt)
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{
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    raise_exception(env, tt);
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}
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void HELPER(divu)(CPUM68KState *env, uint32_t word)
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{
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    uint32_t num;
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    uint32_t den;
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    uint32_t quot;
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    uint32_t rem;
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    uint32_t flags;
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    num = env->div1;
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    den = env->div2;
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    /* ??? This needs to make sure the throwing location is accurate.  */
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    if (den == 0) {
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        raise_exception(env, EXCP_DIV0);
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    }
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    quot = num / den;
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    rem = num % den;
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    flags = 0;
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    if (word && quot > 0xffff)
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        flags |= CCF_V;
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    if (quot == 0)
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        flags |= CCF_Z;
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    else if ((int32_t)quot < 0)
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        flags |= CCF_N;
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    env->div1 = quot;
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    env->div2 = rem;
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    env->cc_dest = flags;
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}
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void HELPER(divs)(CPUM68KState *env, uint32_t word)
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{
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    int32_t num;
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    int32_t den;
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    int32_t quot;
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    int32_t rem;
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    int32_t flags;
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    num = env->div1;
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    den = env->div2;
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    if (den == 0) {
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        raise_exception(env, EXCP_DIV0);
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    }
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    quot = num / den;
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    rem = num % den;
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    flags = 0;
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    if (word && quot != (int16_t)quot)
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        flags |= CCF_V;
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    if (quot == 0)
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        flags |= CCF_Z;
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    else if (quot < 0)
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        flags |= CCF_N;
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    env->div1 = quot;
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    env->div2 = rem;
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    env->cc_dest = flags;
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}
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