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https://github.com/yuzu-emu/unicorn.git
synced 2024-12-23 10:05:40 +00:00
Fix confusing argument names in some common functions
There are functions tlb_fill(), cpu_unaligned_access() and do_unaligned_access() that are called with access type and mmu index arguments. But these arguments are named 'is_write' and 'is_user' in their declarations. The patches fix the arguments to avoid a confusion. Backports commit b35399bb4e9968296a12303b00f9f2066470e987 from qemu
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a465707a47
commit
d1e4ac0451
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@ -14,12 +14,6 @@ struct uc_struct;
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#include "qemu/fprintf-fn.h"
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#include "qemu/typedefs.h"
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typedef enum MMUAccessType {
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MMU_DATA_LOAD = 0,
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MMU_DATA_STORE = 1,
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MMU_INST_FETCH = 2
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} MMUAccessType;
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#if !defined(CONFIG_USER_ONLY)
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enum device_endian {
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@ -371,8 +371,8 @@ void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align));
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struct MemoryRegion *iotlb_to_region(CPUState *cpu,
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hwaddr index, MemTxAttrs attrs);
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void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_idx,
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uintptr_t retaddr);
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void tlb_fill(CPUState *cpu, target_ulong addr, MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr);
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#endif
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#if defined(CONFIG_USER_ONLY)
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@ -60,6 +60,12 @@ typedef uint64_t vaddr;
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#define CPU_CLASS(uc, class) OBJECT_CLASS_CHECK(uc, CPUClass, (class), TYPE_CPU)
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#define CPU_GET_CLASS(uc, obj) OBJECT_GET_CLASS(uc, CPUClass, (obj), TYPE_CPU)
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typedef enum MMUAccessType {
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MMU_DATA_LOAD = 0,
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MMU_DATA_STORE = 1,
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MMU_INST_FETCH = 2
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} MMUAccessType;
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typedef struct CPUWatchpoint CPUWatchpoint;
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typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
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@ -121,7 +127,8 @@ typedef struct CPUClass {
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void (*do_interrupt)(CPUState *cpu);
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CPUUnassignedAccess do_unassigned_access;
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void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
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int is_write, int is_user, uintptr_t retaddr);
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MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr);
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int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
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uint8_t *buf, int len, bool is_write);
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void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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@ -607,12 +614,12 @@ static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
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}
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static inline void cpu_unaligned_access(CPUState *cpu, vaddr addr,
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int is_write, int is_user,
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uintptr_t retaddr)
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MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu->uc, cpu);
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cc->do_unaligned_access(cpu, addr, is_write, is_user, retaddr);
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cc->do_unaligned_access(cpu, addr, access_type, mmu_idx, retaddr);
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}
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#endif
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@ -479,8 +479,9 @@ bool arm_tlb_fill(CPUState *cpu, vaddr address, int rw, int mmu_idx,
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bool arm_s1_regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx);
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/* Raise a data fault alignment exception for the specified virtual address */
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void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write,
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int is_user, uintptr_t retaddr);
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void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
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MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr);
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/* Call the EL change hook if one has been registered */
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static inline void arm_call_el_change_hook(ARMCPU *cpu)
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@ -79,7 +79,7 @@ uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def,
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static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
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unsigned int target_el,
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bool same_el,
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bool s1ptw, int is_write,
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bool s1ptw, bool is_write,
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int fsc)
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{
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uint32_t syn;
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@ -97,7 +97,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
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*/
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if (!(template_syn & ARM_EL_ISV) || target_el != 2 || s1ptw) {
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syn = syn_data_abort_no_iss(same_el,
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0, 0, s1ptw, is_write == 1, fsc);
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0, 0, s1ptw, is_write, fsc);
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} else {
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/* Fields: IL, ISV, SAS, SSE, SRT, SF and AR come from the template
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* syndrome created at translation time.
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@ -105,7 +105,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
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*/
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syn = syn_data_abort_with_iss(same_el,
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0, 0, 0, 0, 0,
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0, 0, s1ptw, is_write == 1, fsc,
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0, 0, s1ptw, is_write, fsc,
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false);
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/* Merge the runtime syndrome with the template syndrome. */
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syn |= template_syn;
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@ -117,14 +117,14 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
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* NULL, it means that the function was called in C code (i.e. not
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* from generated code or from helper.c)
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*/
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void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
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uintptr_t retaddr)
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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{
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bool ret;
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uint32_t fsr = 0;
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ARMMMUFaultInfo fi = {0};
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ret = arm_tlb_fill(cs, addr, is_write, mmu_idx, &fsr, &fi);
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ret = arm_tlb_fill(cs, addr, access_type, mmu_idx, &fsr, &fi);
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if (unlikely(ret)) {
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ARMCPU *cpu = ARM_CPU(cs->uc, cs);
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CPUARMState *env = &cpu->env;
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@ -149,13 +149,15 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
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/* For insn and data aborts we assume there is no instruction syndrome
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* information; this is always true for exceptions reported to EL1.
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*/
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if (is_write == 2) {
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if (access_type == MMU_INST_FETCH) {
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syn = syn_insn_abort(same_el, 0, fi.s1ptw, syn);
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exc = EXCP_PREFETCH_ABORT;
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} else {
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syn = merge_syn_data_abort(env->exception.syndrome, target_el,
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same_el, fi.s1ptw, is_write, syn);
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if (is_write == 1 && arm_feature(env, ARM_FEATURE_V6)) {
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same_el, fi.s1ptw,
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access_type == MMU_DATA_STORE, syn);
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if (access_type == MMU_DATA_STORE
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&& arm_feature(env, ARM_FEATURE_V6)) {
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fsr |= (1 << 11);
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}
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exc = EXCP_DATA_ABORT;
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@ -168,8 +170,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
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}
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/* Raise a data fault alignment exception for the specified virtual address */
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void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write,
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int is_user, uintptr_t retaddr)
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void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
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MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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{
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ARMCPU *cpu = ARM_CPU(cs->uc, cs);
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CPUARMState *env = &cpu->env;
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@ -196,12 +199,13 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write,
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env->exception.fsr = 0x1;
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}
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if (is_write == 1 && arm_feature(env, ARM_FEATURE_V6)) {
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if (access_type == MMU_DATA_STORE && arm_feature(env, ARM_FEATURE_V6)) {
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env->exception.fsr |= (1 << 11);
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}
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syn = merge_syn_data_abort(env->exception.syndrome, target_el,
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same_el, 0, is_write, 0x21);
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same_el, 0, access_type == MMU_DATA_STORE,
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0x21);
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raise_exception(env, EXCP_DATA_ABORT, syn, target_el);
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}
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@ -119,12 +119,12 @@ void helper_boundl(CPUX86State *env, target_ulong a0, int v)
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* from generated code or from helper.c)
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*/
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/* XXX: fix it to restore all registers */
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void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
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uintptr_t retaddr)
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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{
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int ret;
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ret = x86_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
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ret = x86_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (ret) {
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X86CPU *cpu = X86_CPU(cs->uc, cs);
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CPUX86State *env = &cpu->env;
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@ -40,12 +40,12 @@ extern int semihosting_enabled;
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/* Try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
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uintptr_t retaddr)
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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{
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int ret;
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ret = m68k_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
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ret = m68k_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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@ -647,7 +647,8 @@ void mips_cpu_do_interrupt(CPUState *cpu);
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bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
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hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
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int is_write, int is_user, uintptr_t retaddr);
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MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr);
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#if !defined(CONFIG_USER_ONLY)
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int no_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
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@ -2373,8 +2373,8 @@ void helper_wait(CPUMIPSState *env)
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#if !defined(CONFIG_USER_ONLY)
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void mips_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
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int access_type, int is_user,
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uintptr_t retaddr)
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MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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{
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MIPSCPU *cpu = MIPS_CPU(cs->uc, cs);
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CPUMIPSState *env = &cpu->env;
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do_raise_exception_err(env, excp, error_code, retaddr);
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}
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void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
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uintptr_t retaddr)
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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{
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int ret;
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ret = mips_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
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ret = mips_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (ret) {
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MIPSCPU *cpu = MIPS_CPU(cs->uc, cs);
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CPUMIPSState *env = &cpu->env;
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@ -536,9 +536,10 @@ void sparc_cpu_do_interrupt(CPUState *cpu);
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void sparc_cpu_dump_state(CPUState *cpu, FILE *f,
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fprintf_function cpu_fprintf, int flags);
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hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cpu,
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vaddr addr, int is_write,
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int is_user, uintptr_t retaddr);
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void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
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MMUAccessType access_type,
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int mmu_idx,
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uintptr_t retaddr);
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#ifndef NO_CPU_IO_DEFS
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/* cpu_init.c */
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@ -2425,9 +2425,10 @@ void sparc_cpu_unassigned_access(CPUState *cs, hwaddr addr,
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#endif
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#if !defined(CONFIG_USER_ONLY)
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void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cs,
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vaddr addr, int is_write,
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int is_user, uintptr_t retaddr)
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void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
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MMUAccessType access_type,
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int mmu_idx,
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uintptr_t retaddr)
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{
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SPARCCPU *cpu = SPARC_CPU(cs->uc, cs);
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CPUSPARCState *env = &cpu->env;
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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/* XXX: fix it to restore all registers */
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void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
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uintptr_t retaddr)
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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{
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int ret;
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ret = sparc_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
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ret = sparc_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (ret) {
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if (retaddr) {
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cpu_restore_state(cs, retaddr);
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