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ec15ee10d0
bswap_code is a CPU property of sorts ("is the iside endianness the
opposite way round to TARGET_WORDS_BIGENDIAN?") but it is not the
actual CPU state involved here which is SCTLR.B (set for BE32
binaries, clear for BE8).
Replace bswap_code with SCTLR.B, and pass that to arm_ld*_code.
The next patches will make data fetches honor both SCTLR.B and
CPSR.E appropriately.
Backports commit f9fd40ebe4f55e0048e002925b8d65e66d56e7a7 from qemu
49 lines
1.5 KiB
C
49 lines
1.5 KiB
C
/*
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* ARM load/store instructions for code (armeb-user support)
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*
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* Copyright (c) 2012 CodeSourcery, LLC
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef ARM_LDST_H
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#define ARM_LDST_H
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#include "exec/cpu_ldst.h"
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#include "qemu/bswap.h"
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/* Load an instruction and return it in the standard little-endian order */
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static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr,
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bool sctlr_b)
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{
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uint32_t insn = cpu_ldl_code(env, addr);
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if (bswap_code(sctlr_b)) {
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return bswap32(insn);
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}
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return insn;
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}
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/* Ditto, for a halfword (Thumb) instruction */
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static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr,
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bool sctlr_b)
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{
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uint16_t insn = cpu_lduw_code(env, addr);
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if (bswap_code(sctlr_b)) {
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return bswap16(insn);
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}
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return insn;
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}
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#endif
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