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Power ISA 3.0 introduces a few quadruple precision floating point instructions that support round-to-odd rounding mode. The round-to-odd mode is explained as under: Let Z be the intermediate arithmetic result or the operand of a convert operation. If Z can be represented exactly in the target format, the result is Z. Otherwise the result is either Z1 or Z2 whichever is odd. Here Z1 and Z2 are the next larger and smaller numbers representable in the target format respectively. Backports commit 9ee6f678f473007e252934d6acd09c24490d9d42 from qemu |
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softfloat-macros.h | ||
softfloat-specialize.h | ||
softfloat.c |