Michael Clark 8ffa68e757 RISC-V: Change local interrupts from edge to level ... This effectively changes riscv_cpu_update_mip from edge to level. i.e. cpu_interrupt or cpu_reset_interrupt are called regardless of the current interrupt level. Fixes WFI doesn't return when a IPI is issued: - https://github.com/riscv/riscv-qemu/issues/132 To test: 1) Apply RISC-V Linux CPU hotplug patch: - http://lists.infradead.org/pipermail/linux-riscv/2018-May/000603.html 2) Enable CONFIG_CPU_HOTPLUG in linux .config 3) Try to offline and online cpus: echo 1 > /sys/devices/system/cpu/cpu2/online echo 0 > /sys/devices/system/cpu/cpu2/online echo 1 > /sys/devices/system/cpu/cpu2/online Backports commit d26f5a423438e579d3ff0ca35e44edb966a36233 from qemu		2019-03-19 23:58:31 -04:00
..
arm	target/arm: Check access permission to ADDVL/ADDPL/RDVL	2019-03-19 05:42:59 -04:00
i386	i386: extended the cpuid_level when Intel PT is enabled	2019-03-11 16:40:23 -04:00
m68k	target/m68k: Correct instruction emulation	2019-02-28 19:21:49 -05:00
mips	target/mips: Restore Qemu's organization of CPU definitions	2019-03-08 01:40:50 -05:00
riscv	RISC-V: Change local interrupts from edge to level	2019-03-19 23:58:31 -04:00
sparc	target: Resolve repeated typedef warnings	2019-01-22 20:27:35 -05:00