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unicorn/qemu/target
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James Hogan 987401c4d4
target-mips: Don't stop on [d]mtc0 DESAVE/KScratch 
Writing to the MIPS DESAVE register (and now the KScratch registers)
will stop translation, supposedly due to risk of execution mode
switches. However these registers are basically RW scratch registers
with no side effects so there is no risk of them triggering execution
mode changes.

Drop the bstate = BS_STOP for these registers for both mtc0 and dmtc0.

Backports commit cb539fd241900f51de7d21244f7a55422ad0d40a from qemu
2018-03-04 01:25:27 -05:00
..
arm target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset 2018-03-04 01:20:57 -05:00
i386 tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
m68k tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
mips target-mips: Don't stop on [d]mtc0 DESAVE/KScratch 2018-03-04 01:25:27 -05:00
sparc tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00