Sebastian Andrzej Siewior a09a074255 i386: correct cpu_x86_cpuid(0xd) ... Intel SDM says for CPUID function 0DH, sub-function 0: | • ECX enumerates the size (in bytes) required by the XSAVE instruction for an | XSAVE area containing all the user state components supported by this | processor. | • EBX enumerates the size (in bytes) required by the XSAVE instruction for an | XSAVE area containing all the user state components corresponding to bits | currently set in XCR0. Backports commit de2e68c902f7b6e438b0fa3cfedd74a06a20704f from qemu		2018-11-11 07:52:43 -05:00
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arm	target/arm: Only flush tlb if ASID changes	2018-11-10 11:26:24 -05:00
i386	i386: correct cpu_x86_cpuid(0xd)	2018-11-11 07:52:43 -05:00
m68k	Removes accessible assert	2018-10-06 05:02:20 -04:00
mips	target/mips: Amend MXU ASE overview note	2018-11-11 07:30:31 -05:00
sparc	Sparc increase ttl number	2018-10-06 04:55:52 -04:00