Wu Xiang a8de2d4748 target/i386: fix interrupt CPL error when using ist in x86-64 ... In do_interrupt64(), when interrupt stack table(ist) is enabled and the the target code segment is conforming(e2 & DESC_C_MASK), the old implementation always set new CPL to 0, and SS.RPL to 0. This is incorrect for when CPL3 code access a CPL0 conforming code segment, the CPL should remain unchanged. Otherwise higher privileged code can be compromised. The patch fix this for always set dpl = cpl when the target code segment is conforming, and modify the last parameter `flags`, which contains correct new CPL, in cpu_x86_load_seg_cache(). Backports commit e95e9b88ba5f4a6c17f4d0c3a3a6bf3f648bb328 from qemu		2018-03-03 21:18:22 -05:00
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arm	target/arm: Exit after clearing aarch64 interrupt mask	2018-03-03 17:19:40 -05:00
i386	target/i386: fix interrupt CPL error when using ist in x86-64	2018-03-03 21:18:22 -05:00
m68k	target/m68k: add fmovem	2018-03-03 21:05:56 -05:00
mips	target/mips: optimize indirect branches	2018-03-03 14:23:58 -05:00
sparc	cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap	2018-03-02 10:12:40 -05:00