unicorn/qemu/target-mips
Lioncash a913b3e468
tcg: Make cpu_gpr a TCGv array
Commit 5d4e1a1081d3f1ec2908ff0eaebe312389971ab4
allows making the type concrete
2018-02-21 01:02:46 -05:00
..
cpu-qom.h remove slow cpu QOM casts (#815) 2017-05-02 14:56:39 +08:00
cpu.c target-mips: implement R6 multi-threading 2018-02-20 22:02:40 -05:00
cpu.h target-mips: implement R6 multi-threading 2018-02-20 22:02:40 -05:00
dsp_helper.c mips: Clean up includes 2018-02-19 00:45:08 -05:00
helper.c mips: Clean up includes 2018-02-19 00:45:08 -05:00
helper.h target-mips: implement R6 multi-threading 2018-02-20 22:02:40 -05:00
lmi_helper.c mips: Clean up includes 2018-02-19 00:45:08 -05:00
Makefile.objs import 2015-08-21 15:04:50 +08:00
mips-defs.h target-mips: fix MIPS64R6-generic configuration 2018-02-17 15:23:21 -05:00
msa_helper.c mips: Clean up includes 2018-02-19 00:45:08 -05:00
op_helper.c target-mips: implement R6 multi-threading 2018-02-20 22:02:40 -05:00
TODO import 2015-08-21 15:04:50 +08:00
translate.c tcg: Make cpu_gpr a TCGv array 2018-02-21 01:02:46 -05:00
translate_init.c target-mips: implement R6 multi-threading 2018-02-20 22:02:40 -05:00
unicorn.c tcg: Make cpu_gpr a TCGv array 2018-02-21 01:02:46 -05:00
unicorn.h armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition. 2017-03-15 22:25:35 +08:00