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James Hogan b35fb57c84
target/mips: Enable CP0_EBase.WG on MIPS64 CPUs 
Enable the CP0_EBase.WG (write gate) on the I6400 and MIPS64R2-generic
CPUs. This allows 64-bit guests to run KVM itself, which uses
CP0_EBase.WG to point CP0_EBase at XKPhys.

Backports commit bad63a8008a0aaefcd00542c89bee01623d7c9de from qemu
2018-03-04 01:09:47 -05:00
..
arm tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
i386 tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
m68k tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
mips target/mips: Enable CP0_EBase.WG on MIPS64 CPUs 2018-03-04 01:09:47 -05:00
sparc tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00