Robert Hoo b3fccc4841 i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES ... IA32_PRED_CMD MSR gives software a way to issue commands that affect the state of indirect branch predictors. Enumerated by CPUID.(EAX=7H,ECX=0):EDX[26]. IA32_ARCH_CAPABILITIES MSR enumerates architectural features of RDCL_NO and IBRS_ALL. Enumerated by CPUID.(EAX=07H, ECX=0):EDX[29]. https://software.intel.com/sites/default/files/managed/c5/63/336996-Speculative-Execution-Side-Channel-Mitigations.pdf Backports commit 8c80c99fcceabd0708a5a83f08577e778c9419f5 from qemu		2018-08-17 14:26:10 -04:00
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arm	target/arm: Fix aa64 FCADD and FCMLA decode	2018-08-17 14:06:01 -04:00
i386	i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES	2018-08-17 14:26:10 -04:00
m68k	target/m68k: Merge disas_m68k_insn into m68k_tr_translate_insn	2018-06-15 11:40:18 -04:00
mips	target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0	2018-08-17 14:25:22 -04:00
sparc	tcg: Pass tb and index to tcg_gen_exit_tb separately	2018-06-07 11:56:32 -04:00