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unicorn/qemu/target
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Peter Maydell c6bb8d483d
target/arm: Disable most VFP sysregs for M-profile 
The only "system register" that M-profile floating point exposes
via the VMRS/VMRS instructions is FPSCR, and it does not have
the odd special case for rd==15. Add a check to ensure we only
expose FPSCR.

Backports commit ef9aae2522c22c05df17dd898099dd5c3f20d688 from qemu
2019-04-30 10:15:25 -04:00
..
arm target/arm: Disable most VFP sysregs for M-profile 2019-04-30 10:15:25 -04:00
i386 tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00
m68k tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00
mips tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00
riscv tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00
sparc tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00