unicorn/qemu/target/i386
Moger, Babu 8c5f623ac3 i386: Add 2nd Generation AMD EPYC processors
Adds the support for 2nd Gen AMD EPYC Processors. The model display
name will be EPYC-Rome.

Adds the following new feature bits on top of the feature bits from the
first generation EPYC models.
perfctr-core : core performance counter extensions support. Enables the VM to
use extended performance counter support. It enables six
programmable counters instead of four counters.
clzero : instruction zeroes out the 64 byte cache line specified in RAX.
xsaveerptr : XSAVE, XSAVE, FXSAVEOPT, XSAVEC, XSAVES always save error
pointers and FXRSTOR, XRSTOR, XRSTORS always restore error
pointers.
wbnoinvd : Write back and do not invalidate cache
ibpb : Indirect Branch Prediction Barrier
amd-stibp : Single Thread Indirect Branch Predictor
clwb : Cache Line Write Back and Retain
xsaves : XSAVES, XRSTORS and IA32_XSS support
rdpid : Read Processor ID instruction support
umip : User-Mode Instruction Prevention support

The Reference documents are available at
https://developer.amd.com/wp-content/resources/55803_0.54-PUB.pdf
https://www.amd.com/system/files/TechDocs/24594.pdf

Depends on following kernel commits:
40bc47b08b6e ("kvm: x86: Enumerate support for CLZERO instruction")
504ce1954fba ("KVM: x86: Expose XSAVEERPTR to the guest")
6d61e3c32248 ("kvm: x86: Expose RDPID in KVM_GET_SUPPORTED_CPUID")
52297436199d ("kvm: svm: Update svm_xsaves_supported")

Backports commit 143c30d4d346831a09e59e9af45afdca0331e819 from qem
2020-04-30 06:50:02 -04:00
..
arch_memory_mapping.c target/i386: enable A20 automatically in system management mode 2018-03-03 14:33:09 -05:00
bpt_helper.c target/i386: Use env_cpu, env_archcpu 2019-06-12 11:46:35 -04:00
cc_helper.c Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
cc_helper_template.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 19:35:46 -04:00
cpu-qom.h i386: Register versioned CPU models 2019-08-08 19:01:35 -04:00
cpu.c i386: Add 2nd Generation AMD EPYC processors 2020-04-30 06:50:02 -04:00
cpu.h i386: Add 2nd Generation AMD EPYC processors 2020-04-30 06:50:02 -04:00
excp_helper.c target/i386: Use env_cpu, env_archcpu 2019-06-12 11:46:35 -04:00
fpu_helper.c target/i386: check for empty register in FXAM 2020-03-21 19:43:24 -04:00
helper.c target/i386: Use env_cpu, env_archcpu 2019-06-12 11:46:35 -04:00
helper.h target/i386: Implement CPUID_EXT_RDRAND 2019-05-23 15:12:50 -04:00
int_helper.c target/i386: Implement CPUID_EXT_RDRAND 2019-05-23 15:12:50 -04:00
Makefile.objs target/i386: add the CONFIG_TCG into Makefiles 2018-03-03 21:57:22 -05:00
mem_helper.c cpu: Replace ENV_GET_CPU with env_cpu 2019-06-12 11:16:16 -04:00
misc_helper.c target/i386: Use env_cpu, env_archcpu 2019-06-12 11:46:35 -04:00
mpx_helper.c target/i386: move cpu_sync_bndcs_hflags() function 2018-03-03 21:41:26 -05:00
ops_sse.h target/i386: Return 'indefinite integer value' for invalid SSE fp->int conversions 2019-11-18 21:48:03 -05:00
ops_sse_header.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
seg_helper.c check arguments, return error instead of raising exceptions. (#1125) 2020-01-14 09:00:11 -05:00
shift_helper_template.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
smm_helper.c target/i386: Use env_cpu, env_archcpu 2019-06-12 11:46:35 -04:00
svm.h target-i386: Add NPT support 2018-07-03 19:52:56 -04:00
svm_helper.c target/i386: Use env_cpu, env_archcpu 2019-06-12 11:46:35 -04:00
TODO Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
topology.h i386: Update new x86_apicid parsing rules with die_offset support 2019-08-08 18:22:03 -04:00
translate.c tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
unicorn.c check arguments, return error instead of raising exceptions. (#1125) 2020-01-14 09:00:11 -05:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00