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unicorn/qemu/target
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Georg Kotheimer d2cea344f0 target/riscv: Fix implementation of HLVX.WU instruction 
The HLVX.WU instruction is supposed to read a machine word,
but prior to this change it read a byte instead.

Fixes: 8c5362acb57 ("target/riscv: Allow generating hlv/hlvx/hsv instructions")

Backports 1da46012eaaeb2feb3aa6a5a8fc0a03200b673aa
2021-03-08 14:40:28 -05:00
..
arm qemu/atomic.h: rename atomic_ to qatomic_ 2021-03-08 14:34:35 -05:00
i386 qemu/atomic.h: rename atomic_ to qatomic_ 2021-03-08 14:34:35 -05:00
m68k m68k: Fix build 2021-03-05 08:29:53 -05:00
mips mips: Fix build 2021-03-05 08:51:51 -05:00
riscv target/riscv: Fix implementation of HLVX.WU instruction 2021-03-08 14:40:28 -05:00
sparc sparc: Fix build 2021-03-05 08:54:43 -05:00