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unicorn/qemu
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Kirill Batuzov d45ea1ba3b
target-arm: check that LSB <= MSB in BFI instruction 
The documentation states that if LSB > MSB in BFI instruction behaviour
is unpredictable. Currently QEMU crashes because of assertion failure in
this case:

tcg/tcg-op.h:2061: tcg_gen_deposit_i32: Assertion `len <= 32' failed.

While assertion failure may meet the "unpredictable" definition this
behaviour is undesirable because it allows an unprivileged guest program
to crash the emulator with the OS and other programs.

This patch addresses the issue by throwing illegal instruction exception
if LSB > MSB. Only ARM decoder is affected because Thumb decoder already
has this check in place.

To reproduce issue run the following program

int main(void) {
asm volatile (".long 0x07c00c12" :: );
return 0;
}

compiled with
gcc -marm -static badop_arm.c -o badop_arm

Backports commit 45140a57675ecb4b0daee71bf145c24dbdf9429c from qemu
2018-02-12 11:06:12 -05:00
..
default-configs arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
docs cleanup qemu docs 2017-01-18 15:23:40 +08:00
fpu Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
hw Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
include host-utils: Add revbit functions 2018-02-11 02:57:55 -05:00
qapi This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
qobject This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
qom cleanup after msvc port 2017-01-22 21:27:17 +08:00
scripts Save copies of generated qapi files. 2017-01-21 00:30:50 +11:00
target-arm target-arm: check that LSB <= MSB in BFI instruction 2018-02-12 11:06:12 -05:00
target-i386 target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
target-m68k target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
target-mips target-mips: pass 0 instead of -1 as rs in microMIPS LUI instruction 2018-02-11 17:18:08 -05:00
target-sparc target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
tcg tcg: Allow extra data to be attached to insn_start 2018-02-11 13:03:51 -05:00
util Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
aarch64.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
aarch64eb.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
accel.c Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
arm.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
armeb.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
CODING_STYLE import 2015-08-21 15:04:50 +08:00
configure tcg: Drop ia64 host support 2018-02-04 18:33:02 -05:00
COPYING import 2015-08-21 15:04:50 +08:00
COPYING.LIB import 2015-08-21 15:04:50 +08:00
cpu-exec.c Only set eip to the instruction pointer after an interrupt if the interrupt was user-generated (#875) 2017-08-29 17:14:36 +07:00
cpus.c cleanup more synchronization code 2017-01-09 14:05:39 +08:00
cputlb.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
exec.c fix the last fix that crashes samples 2017-02-24 20:34:52 +08:00
gen_all_header.sh arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
glib_compat.c Merge branch 'master' into msvc2 2017-04-21 01:17:00 +08:00
HACKING import 2015-08-21 15:04:50 +08:00
header_gen.py target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
ioport.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
LICENSE import 2015-08-21 15:04:50 +08:00
m68k.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
Makefile cleanup qemu/default-configs/ 2017-01-19 14:52:30 +08:00
Makefile.objs cleanup qemu/Makefile.objs 2017-01-21 21:50:12 +08:00
Makefile.target tcg: Move some opcode generation functions out of line 2018-02-09 08:10:00 -05:00
memory.c merge msvc with master 2017-02-24 10:39:36 +08:00
memory_mapping.c revert to use of g_free to make future qemu integrations easier (#695) 2016-12-21 22:28:36 +08:00
mips.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
mips64.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
mips64el.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
mipsel.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
powerpc.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
qapi-schema.json import 2015-08-21 15:04:50 +08:00
qemu-log.c import 2015-08-21 15:04:50 +08:00
qemu-timer.c timer is redundant 2017-01-20 16:46:58 +08:00
rules.mak import 2015-08-21 15:04:50 +08:00
softmmu_template.h tcg: Add MO_ALIGN, MO_UNALN 2018-02-10 20:18:53 -05:00
sparc.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
sparc64.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00
tcg-runtime.c platform.h move #3 2017-01-21 00:13:21 +11:00
translate-all.c target-mips: Correct MIPS16/microMIPS branch size calculation 2018-02-11 16:09:33 -05:00
translate-all.h import 2015-08-21 15:04:50 +08:00
unicorn_common.h This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
VERSION import 2015-08-21 15:04:50 +08:00
vl.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
vl.h import 2015-08-21 15:04:50 +08:00
x86_64.h target-arm: make PAR banked 2018-02-12 10:40:51 -05:00