Anup Patel d47390ade4 target/riscv: Emulate TIME CSRs for privileged mode ... Currently, TIME CSRs are emulated only for user-only mode. This patch add TIME CSRs emulation for privileged mode. For privileged mode, the TIME CSRs will return value provided by rdtime callback which is registered by QEMU machine/platform emulation (i.e. CLINT emulation). If rdtime callback is not available then the monitor (i.e. OpenSBI) will trap-n-emulate TIME CSRs in software. We see 25+% performance improvement in hackbench numbers when TIME CSRs are not trap-n-emulated. Backports commit c695724868ce4049fd79c5a509880dbdf171e744 from qemu		2020-03-22 02:22:17 -04:00
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arm	target/arm: Implement ARMv8.3-CCIDX	2020-03-22 00:17:37 -04:00
i386	target/i386: check for empty register in FXAM	2020-03-21 19:43:24 -04:00
m68k	m68k: Fix regression causing Single-Step via GDB/RSP to not single step	2020-03-21 12:15:08 -04:00
mips	target/arm: fix TCG leak for fcvt half->double	2020-03-21 13:14:47 -04:00
riscv	target/riscv: Emulate TIME CSRs for privileged mode	2020-03-22 02:22:17 -04:00
sparc	target/sparc: sun4u Invert Endian TTE bit	2020-01-07 19:21:30 -05:00