Peter Collingbourne de7bcbae57 target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks ... Section D6.7 of the ARM ARM states: For the purpose of determining Tag Check Fault handling, unprivileged load and store instructions are treated as if executed at EL0 when executed at either: - EL1, when the Effective value of PSTATE.UAO is 0. - EL2, when both the Effective value of HCR_EL2.{E2H, TGE} is {1, 1} and the Effective value of PSTATE.UAO is 0. ARM has confirmed a defect in the pseudocode function AArch64.TagCheckFault that makes it inconsistent with the above wording. The remedy is to adjust references to PSTATE.EL in that function to instead refer to AArch64.AccessUsesEL(acctype), so that unprivileged instructions use SCTLR_EL1.TCF0 and TFSRE0_EL1. The exception type for synchronous tag check faults remains unchanged. This patch implements the described change by partially reverting commits 50244cc76abc and cc97b0019bb5. Backports 2d928adf8a9148510e1b2041145b8a873f4d26df		2021-03-08 11:34:03 -05:00
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arm	target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks	2021-03-08 11:34:03 -05:00
i386	i386: Fix build	2021-03-05 08:35:14 -05:00
m68k	m68k: Fix build	2021-03-05 08:29:53 -05:00
mips	mips: Fix build	2021-03-05 08:51:51 -05:00
riscv	target/riscv: Enable vector extensions	2021-03-08 11:18:36 -05:00
sparc	sparc: Fix build	2021-03-05 08:54:43 -05:00