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unicorn/qemu/target/arm
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Peter Maydell e528c8229e target/arm: Get correct MMU index for other-security-state 
In arm_v7m_mmu_idx_for_secstate() we get the 'priv' level to pass to
armv7m_mmu_idx_for_secstate_and_priv() by calling arm_current_el().
This is incorrect when the security state being queried is not the
current one, because arm_current_el() uses the current security state
to determine which of the banked CONTROL.nPRIV bits to look at.
The effect was that if (for instance) Secure state was in privileged
mode but Non-Secure was not then we would return the wrong MMU index.

The only places where we are using this function in a way that could
trigger this bug are for the stack loads during a v8M function-return
and for the instruction fetch of a v8M SG insn.

Fix the bug by expanding out the M-profile version of the
arm_current_el() logic inline so it can use the passed in secstate
rather than env->v7m.secure.

Backports 7142eb9e24b4aa5118cd67038057f15694d782aa
2021-03-02 13:08:44 -05:00
..
a32-uncond.decode target/arm: Convert Unallocated memory hint 2019-11-28 02:47:41 -05:00
a32.decode target/arm: Convert A32 coprocessor insns to decodetree 2021-02-26 10:57:00 -05:00
arm-powerctl.c arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on() 2020-01-07 18:10:29 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2018-03-02 00:20:11 -05:00
cpu-param.h target/arm: Don't use a TLB for ARMMMUIdx_Stage2 2020-05-07 08:40:06 -04:00
cpu-qom.h arm: Fix typo in AARCH64_CPU_GET_CLASS definition 2021-03-01 18:03:29 -05:00
cpu.c target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension 2021-03-01 20:36:02 -05:00
cpu.h target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension 2021-03-01 20:36:02 -05:00
cpu64.c target/arm: Make '-cpu max' have a 48-bit PA 2021-03-01 19:50:28 -05:00
crypto_helper.c target/arm: Split helper_crypto_sm3tt 2020-06-14 23:24:21 -04:00
debug_helper.c target/arm: Stop assuming DBGDIDR always exists 2020-03-21 18:26:24 -04:00
helper-a64.c target/arm: Remove local definitions of float constants 2021-02-27 16:47:10 -05:00
helper-a64.h target/arm: Add helper_mte_check_zva 2021-02-25 17:17:54 -05:00
helper-sve.h target/arm: Merge helper_sve_clr_* and helper_sve_movz_* 2021-02-26 14:23:06 -05:00
helper.c target/arm: fix LORID_EL1 access check 2021-03-02 13:06:50 -05:00
helper.h target/arm: AArch32 VCVT fixed-point to float is always round-to-nearest 2021-03-01 20:04:31 -05:00
internals.h target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11 2021-03-01 20:12:36 -05:00
iwmmxt_helper.c target/arm: Untabify iwmmxt_helper.c 2018-08-25 04:33:44 -04:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
m-nocp.decode target/arm: Implement v8.1M NOCP handling 2021-03-01 20:16:09 -05:00
m_helper.c target/arm: Get correct MMU index for other-security-state 2021-03-02 13:08:44 -05:00
Makefile.objs target/arm: Do M-profile NOCP checks early and via decodetree 2021-02-26 11:17:23 -05:00
mte_helper.c target/arm: Fix reported EL for mte_check_fail 2021-03-01 20:10:44 -05:00
neon-dp.decode target/arm: Convert Neon VCVT fp size field to MO_* in decode 2021-03-01 18:20:11 -05:00
neon-ls.decode target/arm: Convert Neon 'load/store single structure' to decodetree 2020-05-07 09:32:17 -04:00
neon-shared.decode target/arm: Convert VCMLA, VCADD size field to MO_* in decode 2021-03-01 18:23:34 -05:00
neon_helper.c target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree 2020-05-15 23:26:51 -04:00
op_addsub.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_helper.c target/arm: Implement LDG, STG, ST2G instructions 2021-02-25 15:08:44 -05:00
pauth_helper.c target/arm: Fix AddPAC error indication 2021-02-25 23:44:28 -05:00
psci.c fix WFI/WFE length in syndrome register 2018-03-05 11:21:51 -05:00
sve.decode target/arm: Tidy SVE tszimm shift formats 2021-02-26 14:35:53 -05:00
sve_helper.c target/arm: Merge helper_sve_clr_* and helper_sve_movz_* 2021-02-26 14:23:06 -05:00
t16.decode target/arm: Convert T16, long branches 2019-11-28 02:53:54 -05:00
t32.decode target/arm: Implement v8.1M low-overhead-loop instructions 2021-03-01 20:29:04 -05:00
tlb_helper.c target/arm: Cache the Tagged bit for a page in MemTxAttrs 2021-02-25 22:48:04 -05:00
translate-a64.c target/arm/translate-a64:Remove redundant statement in disas_simd_two_reg_misc_fp16() 2021-02-27 16:45:25 -05:00
translate-a64.h target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr() 2021-02-26 11:46:51 -05:00
translate-neon.inc.c target/arm: Improve do_prewiden_3d 2021-03-02 13:00:25 -05:00
translate-sve.c target/arm: Fix SVE splice 2021-03-01 19:20:44 -05:00
translate-vfp.inc.c target/arm: Rename neon_load_reg64 to vfp_load_reg64 2021-03-02 12:43:25 -05:00
translate.c target/arm: Improve do_prewiden_3d 2021-03-02 13:00:25 -05:00
translate.h target/arm: Rearrange {sve,fp}_check_access assert 2021-02-26 13:56:27 -05:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_aarch64.c unicorn_aarch64: Use aa64_vfp_qreg instead of aa32_vfp_dreg 2018-09-03 07:47:40 +01:00
unicorn_arm.c arm/translate: Do not tracecode when in an IT block 2021-02-07 19:14:32 +00:00
vec_helper.c target/arm: Fix VUDOT/VSDOT (scalar) on big-endian hosts 2021-03-02 13:03:51 -05:00
vec_internal.h arm: Add missing file vec_internal.h 2020-06-20 00:12:09 +01:00
vfp-uncond.decode target/arm: Implement new VFP fp16 insn VMOVX 2021-03-01 16:24:50 -05:00
vfp.decode target/arm: Implement VFP fp16 VMOV between gp and halfprec registers 2021-03-01 16:26:34 -05:00
vfp_helper.c target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension 2021-03-01 20:36:02 -05:00