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Richard Henderson f0bb9a7f39 target/riscv: Generate nanboxed results from trans_rvf.inc.c 
Make sure that all results from inline single-precision scalar
operations are properly nan-boxed to 64-bits.

Backports 40eaa473611936445ae9c63841445cfa6e36840b
2021-03-08 12:26:49 -05:00
..
arm target/arm/cpu: Update coding style to make checkpatch.pl happy 2021-03-08 11:35:28 -05:00
i386 i386: Fix build 2021-03-05 08:35:14 -05:00
m68k m68k: Fix build 2021-03-05 08:29:53 -05:00
mips mips: Fix build 2021-03-05 08:51:51 -05:00
riscv target/riscv: Generate nanboxed results from trans_rvf.inc.c 2021-03-08 12:26:49 -05:00
sparc sparc: Fix build 2021-03-05 08:54:43 -05:00