Peter Maydell f9b4381ce0 nvic: Implement Security Attribution Unit registers ... Implement the register interface for the SAU: SAU_CTRL, SAU_TYPE, SAU_RNR, SAU_RBAR and SAU_RLAR. None of the actual behaviour is implemented here; registers just read back as written. When the CPU definition for Cortex-M33 is eventually added, its initfn will set cpu->sau_sregion, in the same way that we currently set cpu->pmsav7_dregion for the M3 and M4. Number of SAU regions is typically a configurable CPU parameter, but this patch doesn't provide a QEMU CPU property for it. We can easily add one when we have a board that requires it. Backports commit 9901c576f6c02d43206e5faaf6e362ab7ea83246 from qemu		2018-03-05 01:55:11 -05:00
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arm	nvic: Implement Security Attribution Unit registers	2018-03-05 01:55:11 -05:00
i386	i386/cpu/hyperv: support over 64 vcpus for windows guests	2018-03-05 00:00:53 -05:00
m68k	target/m68k: Switch fpu_rom from make_floatx80() to make_floatx80_init()	2018-03-04 23:05:01 -05:00
mips	mips: Improve macro parenthesization	2018-03-05 00:51:51 -05:00
sparc	sparc: Fix typedef clash	2018-03-04 23:05:50 -05:00