unicorn/qemu/target-i386
Dave Hansen f50acc467f
target-i386: fix typo in xsetbv implementation
QEMU 2.6 added support for the XSAVE family of instructions, which
includes the XSETBV instruction which allows setting the XCR0
register.

But, when booting Linux kernels with XSAVE support enabled, I was
getting very early crashes where the instruction pointer was set
to 0x3. I tracked it down to a jump instruction generated by this:

gen_jmp_im(s->pc - pc_start);

where s->pc is pointing to the instruction after XSETBV and pc_start
is pointing _at_ XSETBV. Subtract the two and you get 0x3. Whoops.

The fix is to replace this typo with the pattern found everywhere
else in the file when folks want to end the translation buffer.

Richard Henderson confirmed that this is a bug and that this is the
correct fix.

Backports commit 502c8e86ea07294067578292c6d402601c196019 from qemu
2018-02-23 14:15:35 -05:00
..
arch_memory_mapping.c x86: Clean up includes 2018-02-19 01:00:09 -05:00
bpt_helper.c x86: Clean up includes 2018-02-19 01:00:09 -05:00
cc_helper.c target-i386: Perform set/reset_inhibit_irq inline 2018-02-20 13:34:47 -05:00
cc_helper_template.h This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
cpu-qom.h target-i386: create a separate AddressSpace for each CPU 2018-02-13 12:36:26 -05:00
cpu.c target-i386: implement PKE for TCG 2018-02-22 10:18:55 -05:00
cpu.h target-i386: implement PKE for TCG 2018-02-22 10:18:55 -05:00
excp_helper.c x86: Clean up includes 2018-02-19 01:00:09 -05:00
fpu_helper.c target-i386: implement PKE for TCG 2018-02-22 10:18:55 -05:00
helper.c target-i386: check for PKU even for non-writable pages 2018-02-23 13:23:37 -05:00
helper.h target-i386: implement PKE for TCG 2018-02-22 10:18:55 -05:00
int_helper.c target-i386: Implement FSGSBASE 2018-02-20 14:45:58 -05:00
Makefile.objs target-i386: Enable control registers for MPX 2018-02-20 13:27:46 -05:00
mem_helper.c target-i386: Update BNDSTATUS for exceptions raised by BOUND 2018-02-20 14:24:07 -05:00
misc_helper.c target-i386: implement PKE for TCG 2018-02-22 10:18:55 -05:00
mpx_helper.c target-i386: fix confusion in xcr0 bit position vs. mask 2018-02-20 21:00:41 -05:00
ops_sse.h target-i386: Rename XMM_[BWLSDQ] helpers to ZMM_* 2018-02-18 23:53:16 -05:00
ops_sse_header.h target-i386: Rename struct XMMReg to ZMMReg 2018-02-18 23:46:30 -05:00
seg_helper.c target-i386: Rewrite gen_enter inline 2018-02-20 10:13:43 -05:00
shift_helper_template.h This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
smm_helper.c target-i386: Enable control registers for MPX 2018-02-20 13:27:46 -05:00
svm.h Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
svm_helper.c x86: Clean up includes 2018-02-19 01:00:09 -05:00
TODO import 2015-08-21 15:04:50 +08:00
topology.h cpu: Introduce X86CPUTopoInfo structure for argument simplification 2018-02-23 10:58:43 -05:00
translate.c target-i386: fix typo in xsetbv implementation 2018-02-23 14:15:35 -05:00
unicorn.c tcg: Make cpu_tmp1 and cpu_tmp4 a TCGv 2018-02-21 00:07:23 -05:00
unicorn.h New feature: registers can be bulk saved/restored in an opaque blob 2016-08-20 04:14:07 -07:00