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Add missing fp_access_check() to aarch64 crypto instructions

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The aarch64 crypto instructions for AES and SHA are missing the
check for if the FPU is enabled.

Backports commit a4f5c5b72380deeccd53a6890ea3782f10ca8054 from qemu
This commit is contained in:
Nick Reilly 2018-03-02 10:38:11 -05:00 committed by Lioncash
parent caba238b5a
commit 4114fb2c0e
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 12 additions and 0 deletions
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12
qemu/target/arm/translate-a64.c
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@ -11079,6 +11079,10 @@ static void disas_crypto_aes(DisasContext *s, uint32_t insn)
return;
}
if (!fp_access_check(s)) {
return;
}
/* Note that we convert the Vx register indexes into the
* index within the vfp.regs[] array, so we can share the
* helper with the AArch32 instructions.
@ -11144,6 +11148,10 @@ static void disas_crypto_three_reg_sha(DisasContext *s, uint32_t insn)
return;
}
if (!fp_access_check(s)) {
return;
}
tcg_rd_regno = tcg_const_i32(tcg_ctx, rd << 1);
tcg_rn_regno = tcg_const_i32(tcg_ctx, rn << 1);
tcg_rm_regno = tcg_const_i32(tcg_ctx, rm << 1);
@ -11208,6 +11216,10 @@ static void disas_crypto_two_reg_sha(DisasContext *s, uint32_t insn)
return;
}
if (!fp_access_check(s)) {
return;
}
tcg_rd_regno = tcg_const_i32(tcg_ctx, rd << 1);
tcg_rn_regno = tcg_const_i32(tcg_ctx, rn << 1);