target/arm: Stop using cpu_F0s for NEON_2RM_VABS_F

Where Neon instructions are floating point operations, we
mostly use the old VFP utility functions like gen_vfp_abs()
which work on the TCG globals cpu_F0s and cpu_F1s. The
Neon for-each-element loop conditionally loads the inputs
into either a plain old TCG temporary for most operations
or into cpu_F0s for float operations, and similarly stores
back either cpu_F0s or the temporary.

Switch NEON_2RM_VABS_F away from using cpu_F0s, and
update neon_2rm_is_float_op() accordingly.

Backports commit fd8a68cdcf81d70eebf866a132e9780d4108da9c from qemu
This commit is contained in:
Peter Maydell 2019-06-25 18:22:03 -05:00 committed by Lioncash
parent ba0ddd3459
commit 63d7f92eba
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7

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@ -1429,15 +1429,6 @@ static TCGv_ptr get_fpstatus_ptr(DisasContext *s, int neon)
return statusptr; return statusptr;
} }
static inline void gen_vfp_abs(DisasContext *s, int dp)
{
TCGContext *tcg_ctx = s->uc->tcg_ctx;
if (dp)
gen_helper_vfp_absd(tcg_ctx, s->F0d, s->F0d);
else
gen_helper_vfp_abss(tcg_ctx, s->F0s, s->F0s);
}
static inline void gen_vfp_neg(DisasContext *s, int dp) static inline void gen_vfp_neg(DisasContext *s, int dp)
{ {
TCGContext *tcg_ctx = s->uc->tcg_ctx; TCGContext *tcg_ctx = s->uc->tcg_ctx;
@ -4327,8 +4318,13 @@ static const uint8_t neon_3r_sizes[] = {
static int neon_2rm_is_float_op(int op) static int neon_2rm_is_float_op(int op)
{ {
/* Return true if this neon 2reg-misc op is float-to-float */ /*
return (op == NEON_2RM_VABS_F || op == NEON_2RM_VNEG_F || * Return true if this neon 2reg-misc op is float-to-float.
* This is not a property of the operation but of our code --
* what we are asking here is "does the code for this case in
* the Neon for-each-pass loop use cpu_F0s?".
*/
return (op == NEON_2RM_VNEG_F ||
(op >= NEON_2RM_VRINTN && op <= NEON_2RM_VRINTZ) || (op >= NEON_2RM_VRINTN && op <= NEON_2RM_VRINTZ) ||
op == NEON_2RM_VRINTM || op == NEON_2RM_VRINTM ||
(op >= NEON_2RM_VRINTP && op <= NEON_2RM_VCVTMS) || (op >= NEON_2RM_VRINTP && op <= NEON_2RM_VCVTMS) ||
@ -6900,7 +6896,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
break; break;
} }
case NEON_2RM_VABS_F: case NEON_2RM_VABS_F:
gen_vfp_abs(s, 0); gen_helper_vfp_abss(tcg_ctx, tmp, tmp);
break; break;
case NEON_2RM_VNEG_F: case NEON_2RM_VNEG_F:
gen_vfp_neg(s, 0); gen_vfp_neg(s, 0);