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i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES

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IA32_PRED_CMD MSR gives software a way to issue commands that affect the state
of indirect branch predictors. Enumerated by CPUID.(EAX=7H,ECX=0):EDX[26].
IA32_ARCH_CAPABILITIES MSR enumerates architectural features of RDCL_NO and
IBRS_ALL. Enumerated by CPUID.(EAX=07H, ECX=0):EDX[29].

https://software.intel.com/sites/default/files/managed/c5/63/336996-Speculative-Execution-Side-Channel-Mitigations.pdf

Backports commit 8c80c99fcceabd0708a5a83f08577e778c9419f5 from qemu
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Robert Hoo 2018-08-17 14:26:02 -04:00 committed by Lioncash
parent eb775926fd
commit b3fccc4841
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1 changed files with 2 additions and 0 deletions
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qemu/target/i386/cpu.h
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@ -332,6 +332,8 @@
#define MSR_TSC_ADJUST 0x0000003b
#define MSR_IA32_SPEC_CTRL 0x48
#define MSR_VIRT_SSBD 0xc001011f
#define MSR_IA32_PRED_CMD 0x49
#define MSR_IA32_ARCH_CAPABILITIES 0x10a
#define MSR_IA32_TSCDEADLINE 0x6e0
#define FEATURE_CONTROL_LOCKED (1<<0)